From patchwork Fri Dec 4 12:11:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 337752 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp349204jai; Fri, 4 Dec 2020 04:12:44 -0800 (PST) X-Google-Smtp-Source: ABdhPJw0Mcse6Sg3w30gucup7b7KbrTVvQW7Xll+0JB/XgZDgF/A8lp5/1BnulcAwj+ApbP37gUP X-Received: by 2002:a17:906:a1cb:: with SMTP id bx11mr6572690ejb.508.1607083964771; Fri, 04 Dec 2020 04:12:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1607083964; cv=none; d=google.com; s=arc-20160816; b=0XLKGJfP3BD3qmn60E64sOOpGS7a0T8IQoDJkPeJ7oaflP/tf9DBPb6noRK2gd3EbY 2TnNE00qwWFit+o0cSAbWthjCZoTUbCGmZEFyqskb0Qide1TWQz+tkS1Zaj+6/jU49RD 6zixfoKBTBKInmLnu+Xr47jNkIJavEO9ZyLumyw/v0OqqS9VvyQ6HyEv0kFZZ1LayM8u ZUucnirjO/1zHVvN15PFABi0A1ICFTEdXm/KA1CmAEJxdkLbKdNIKzQ4qDow5hyXI/0u IFiBNRIpVtzgGY2mTdNV4O9XsbiNwi5dX4mh/w2lT7vJqYsOt3z1dOt5vSiTvS9CkjxK axKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Q3vu4cGFX9vy6C6ao8lGVWMIGG2U9jLdocSkFTB5m3Y=; b=SEEaSj6PBEzvix1Tj6UTDSDhOwREhrZFkZMf+cus0PlbUtpkxohgZPvUxhe0+8c9Nc SIp6wde7xA8+FUx2zcKRmEZlFSiTWoi161DkAkrQtI/3/NU0qjo3BrjpLPSs7LMj2UW6 /G4QAWkxydjmCyiIYr9E4n1DxksHyA1zGW7LWPFZCQlwhKUfaQz8mgepdV2/OfKa8fon 9IosxtQULhmnoSCVEioz3hSKKY7EkvWYvrsDInuxq4BiwqQTICsxwcoTZgRZ7xEImlKx CUWK2wmJiUqx3L6iBYt5bZNhOQ9bCkzu2xfJLD8gpzr+lWXK1uMN7qd7SWv/DLWIZouK 2Rrg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j7si1378099ejm.185.2020.12.04.04.12.44; Fri, 04 Dec 2020 04:12:44 -0800 (PST) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730195AbgLDMMd (ORCPT + 6 others); Fri, 4 Dec 2020 07:12:33 -0500 Received: from foss.arm.com ([217.140.110.172]:33092 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730188AbgLDMMd (ORCPT ); Fri, 4 Dec 2020 07:12:33 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D0525143B; Fri, 4 Dec 2020 04:11:47 -0800 (PST) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 7FFA83F575; Fri, 4 Dec 2020 04:11:46 -0800 (PST) From: Sudeep Holla To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Cc: Sudeep Holla , Trilok Soni , arve@android.com, Andrew Walbran , David Hartley , Achin Gupta , Jens Wiklander , Arunachalam Ganapathy Subject: [PATCH v3 2/7] arm64: smccc: Add support for SMCCCv1.2 input/output registers Date: Fri, 4 Dec 2020 12:11:32 +0000 Message-Id: <20201204121137.2966778-3-sudeep.holla@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201204121137.2966778-1-sudeep.holla@arm.com> References: <20201204121137.2966778-1-sudeep.holla@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SMCCC v1.2 allows x8-x17 to be used as parameter registers and x4—x17 to be used as result registers in SMC64/HVC64. Arm Firmware Framework for Armv8-A specification makes use of x0-x7 as parameter and result registers. Current SMCCC interface in the kernel just use x0-x7 as parameter and x0-x3 as result registers. Let us add new interface to support x0-x7 as parameter and result registers. This can be extended to include x8-x17 when there are users for the same. Signed-off-by: Sudeep Holla --- arch/arm64/kernel/asm-offsets.c | 4 +++ arch/arm64/kernel/smccc-call.S | 22 +++++++++++++++ include/linux/arm-smccc.h | 50 +++++++++++++++++++++++++++++++++ 3 files changed, 76 insertions(+) -- 2.25.1 diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c index 7d32fc959b1a..32bcc25337ce 100644 --- a/arch/arm64/kernel/asm-offsets.c +++ b/arch/arm64/kernel/asm-offsets.c @@ -122,6 +122,10 @@ int main(void) DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2)); DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id)); DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state)); + DEFINE(ARM_SMCCC_V1_2_RES_X0_OFFS, offsetof(struct arm_smccc_v1_2_res, a0)); + DEFINE(ARM_SMCCC_V1_2_RES_X2_OFFS, offsetof(struct arm_smccc_v1_2_res, a2)); + DEFINE(ARM_SMCCC_V1_2_RES_X4_OFFS, offsetof(struct arm_smccc_v1_2_res, a4)); + DEFINE(ARM_SMCCC_V1_2_RES_X6_OFFS, offsetof(struct arm_smccc_v1_2_res, a6)); BLANK(); DEFINE(HIBERN_PBE_ORIG, offsetof(struct pbe, orig_address)); DEFINE(HIBERN_PBE_ADDR, offsetof(struct pbe, address)); diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S index d62447964ed9..0ea15c1742f3 100644 --- a/arch/arm64/kernel/smccc-call.S +++ b/arch/arm64/kernel/smccc-call.S @@ -43,3 +43,25 @@ SYM_FUNC_START(__arm_smccc_hvc) SMCCC hvc SYM_FUNC_END(__arm_smccc_hvc) EXPORT_SYMBOL(__arm_smccc_hvc) + + .macro SMCCC_v1_2 instr + .cfi_startproc + \instr #0 + ldr x8, [sp] + stp x0, x1, [x8, #ARM_SMCCC_V1_2_RES_X0_OFFS] + stp x2, x3, [x8, #ARM_SMCCC_V1_2_RES_X2_OFFS] + stp x4, x5, [x8, #ARM_SMCCC_V1_2_RES_X4_OFFS] + stp x6, x7, [x8, #ARM_SMCCC_V1_2_RES_X6_OFFS] + ret + .cfi_endproc +.endm + +SYM_FUNC_START(arm_smccc_v1_2_hvc) + SMCCC_v1_2 hvc +SYM_FUNC_END(arm_smccc_v1_2_hvc) +EXPORT_SYMBOL(arm_smccc_v1_2_hvc) + +SYM_FUNC_START(arm_smccc_v1_2_smc) + SMCCC_v1_2 smc +SYM_FUNC_END(arm_smccc_v1_2_smc) +EXPORT_SYMBOL(arm_smccc_v1_2_smc) diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index f860645f6512..66fd3d582c7f 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -155,6 +155,56 @@ struct arm_smccc_res { unsigned long a3; }; +#ifdef CONFIG_ARM64 +/* TODO Need to implement for ARM too */ +/** + * struct arm_smccc_v1_2_res - Result from SMC/HVC call + * @a0-a7 result values from registers 0 to 7 + */ +struct arm_smccc_v1_2_res { + unsigned long a0; + unsigned long a1; + unsigned long a2; + unsigned long a3; + unsigned long a4; + unsigned long a5; + unsigned long a6; + unsigned long a7; +}; + +/** + * arm_smccc_v1_2_hvc() - make HVC calls + * @a0-a7: arguments passed in registers 0 to 7 + * @res: result values from registers 0 to 7 + * + * This function is used to make HVC calls following SMC Calling Convention + * v1.2 or above. The content of the supplied param are copied to registers + * 0 to 7 prior to the HVC instruction. The return values are updated with + * the content from register 0 to 7 on return from the HVC instruction. + */ +asmlinkage +void arm_smccc_v1_2_hvc(unsigned long a0, unsigned long a1, unsigned long a2, + unsigned long a3, unsigned long a4, unsigned long a5, + unsigned long a6, unsigned long a7, + struct arm_smccc_v1_2_res *res); + +/** + * arm_smccc_v1_2_smc() - make SMC calls + * @a0-a7: arguments passed in registers 0 to 7 + * @res: result values from registers 0 to 7 + * + * This function is used to make SMC calls following SMC Calling Convention + * v1.2 or above. The content of the supplied param are copied to registers + * 0 to 7 prior to the SMC instruction. The return values are updated with + * the content from register 0 to 7 on return from the SMC instruction. + */ +asmlinkage +void arm_smccc_v1_2_smc(unsigned long a0, unsigned long a1, unsigned long a2, + unsigned long a3, unsigned long a4, unsigned long a5, + unsigned long a6, unsigned long a7, + struct arm_smccc_v1_2_res *res); +#endif + /** * struct arm_smccc_quirk - Contains quirk information * @id: quirk identification