diff mbox series

[09/16] soc: imx: gpcv2: add support for optional resets

Message ID 20210429073050.21039-10-peng.fan@oss.nxp.com
State Superseded
Headers show
Series soc: imx: gpcv2: support i.MX8MM | expand

Commit Message

Peng Fan (OSS) April 29, 2021, 7:30 a.m. UTC
From: Lucas Stach <l.stach@pengutronix.de>

Normally the reset for the devices inside the power domain is
triggered automatically from the PGC in the power-up sequencing,
however on i.MX8MM this doesn't work for the GPU power domains.

Add support for triggering the reset explicitly during the power
up sequencing.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 drivers/soc/imx/gpcv2.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

Comments

Frieder Schrempf May 3, 2021, 2:30 p.m. UTC | #1
On 29.04.21 09:30, Peng Fan (OSS) wrote:
> From: Lucas Stach <l.stach@pengutronix.de>

> 

> Normally the reset for the devices inside the power domain is

> triggered automatically from the PGC in the power-up sequencing,

> however on i.MX8MM this doesn't work for the GPU power domains.

> 

> Add support for triggering the reset explicitly during the power

> up sequencing.

> 

> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

> ---

>   drivers/soc/imx/gpcv2.c | 15 +++++++++++++++

>   1 file changed, 15 insertions(+)

> 

> diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c

> index 640f4165cfba..4a2c2a255d1a 100644

> --- a/drivers/soc/imx/gpcv2.c

> +++ b/drivers/soc/imx/gpcv2.c

> @@ -15,6 +15,7 @@

>   #include <linux/pm_runtime.h>

>   #include <linux/regmap.h>

>   #include <linux/regulator/consumer.h>

> +#include <linux/reset.h>

>   #include <linux/sizes.h>

>   #include <dt-bindings/power/imx7-power.h>

>   #include <dt-bindings/power/imx8mq-power.h>

> @@ -108,6 +109,7 @@ struct imx_pgc_domain {

>   	struct generic_pm_domain genpd;

>   	struct regmap *regmap;

>   	struct regulator *regulator;

> +	struct reset_control *reset;

>   	struct clk_bulk_data *clks;

>   	int num_clks;

>   

> @@ -163,6 +165,8 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)

>   		goto out_regulator_disable;

>   	}

>   

> +	reset_control_assert(domain->reset);

> +

>   	if (domain->bits.pxx) {

>   		/* request the domain to power up */

>   		regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ,

> @@ -185,6 +189,11 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)

>   				   GPC_PGC_CTRL_PCR, 0);

>   	}

>   

> +	/* delay for reset to propagate */

> +	udelay(5);

> +

> +	reset_control_deassert(domain->reset);

> +

>   	/* request the ADB400 to power up */

>   	if (domain->bits.hskreq) {

>   		regmap_update_bits(domain->regmap, GPC_PU_PWRHSK,

> @@ -531,11 +540,17 @@ static int imx_pgc_domain_probe(struct platform_device *pdev)

>   				      domain->voltage, domain->voltage);

>   	}

>   

> +


Spurious blank line. Otherwise:

Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>


>   	domain->num_clks = devm_clk_bulk_get_all(domain->dev, &domain->clks);

>   	if (domain->num_clks < 0)

>   		return dev_err_probe(domain->dev, domain->num_clks,

>   				     "Failed to get domain's clocks\n");

>   

> +	domain->reset = devm_reset_control_array_get_optional_exclusive(domain->dev);

> +	if (IS_ERR(domain->reset))

> +		return dev_err_probe(domain->dev, PTR_ERR(domain->reset),

> +				     "Failed to get domain's resets\n");

> +

>   	pm_runtime_enable(domain->dev);

>   

>   	if (domain->bits.map)

>
diff mbox series

Patch

diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index 640f4165cfba..4a2c2a255d1a 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -15,6 +15,7 @@ 
 #include <linux/pm_runtime.h>
 #include <linux/regmap.h>
 #include <linux/regulator/consumer.h>
+#include <linux/reset.h>
 #include <linux/sizes.h>
 #include <dt-bindings/power/imx7-power.h>
 #include <dt-bindings/power/imx8mq-power.h>
@@ -108,6 +109,7 @@  struct imx_pgc_domain {
 	struct generic_pm_domain genpd;
 	struct regmap *regmap;
 	struct regulator *regulator;
+	struct reset_control *reset;
 	struct clk_bulk_data *clks;
 	int num_clks;
 
@@ -163,6 +165,8 @@  static int imx_pgc_power_up(struct generic_pm_domain *genpd)
 		goto out_regulator_disable;
 	}
 
+	reset_control_assert(domain->reset);
+
 	if (domain->bits.pxx) {
 		/* request the domain to power up */
 		regmap_update_bits(domain->regmap, GPC_PU_PGC_SW_PUP_REQ,
@@ -185,6 +189,11 @@  static int imx_pgc_power_up(struct generic_pm_domain *genpd)
 				   GPC_PGC_CTRL_PCR, 0);
 	}
 
+	/* delay for reset to propagate */
+	udelay(5);
+
+	reset_control_deassert(domain->reset);
+
 	/* request the ADB400 to power up */
 	if (domain->bits.hskreq) {
 		regmap_update_bits(domain->regmap, GPC_PU_PWRHSK,
@@ -531,11 +540,17 @@  static int imx_pgc_domain_probe(struct platform_device *pdev)
 				      domain->voltage, domain->voltage);
 	}
 
+
 	domain->num_clks = devm_clk_bulk_get_all(domain->dev, &domain->clks);
 	if (domain->num_clks < 0)
 		return dev_err_probe(domain->dev, domain->num_clks,
 				     "Failed to get domain's clocks\n");
 
+	domain->reset = devm_reset_control_array_get_optional_exclusive(domain->dev);
+	if (IS_ERR(domain->reset))
+		return dev_err_probe(domain->dev, PTR_ERR(domain->reset),
+				     "Failed to get domain's resets\n");
+
 	pm_runtime_enable(domain->dev);
 
 	if (domain->bits.map)