From patchwork Wed May 26 18:28:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 448213 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp5476277jac; Wed, 26 May 2021 11:28:18 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxD+m27Z58ON/rpCApx2kvmAK73DYccsZYRztAmNFK6lx7+iGEafDUaTqoI/eJIYteDsgtc X-Received: by 2002:a02:aa97:: with SMTP id u23mr4394537jai.13.1622053697691; Wed, 26 May 2021 11:28:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622053697; cv=none; d=google.com; s=arc-20160816; b=ICuHXt3SjzADz1pdcmV+cik/UzIawk1GUDjwJ6cjYU5qOywQfP7JUcr4klxV12xMq/ 53Aw1vTUKpFdAtqypRhvTOLAHZyvVsfom0K7AObdF4eSi2mv0FK77JKK/0Bx4vbkslOV NVAn99GA5Ful6lk/yg4md8vvn2uR0Ul6lhmHX3JNsX0Yuje8ytpN+955Ehrm1vkxKSXE 7PreOjyQTluNoOxz/tieUN3JNzJH1GXMovbYT4eaENTra1Fr9O9RlgTAieJ8sqQKURJb /bvsjxnncIVGprvNY+LcbuPY8fkV7k2a4aO5OBFRqIrHjy/sw4jWk6SEMsgNM8YrQXYm 2ltQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=s4Bw8VPc0aGAtOv5UUvf8+xtOXOMBF/VdbWp+OunHgk=; b=VgAqX9ZT7i+RuJvCucLV+DzcfMyrM5EPyQXlChXTbthr7DoXLJOAUdCbhs4R5IYoYi WXC6W5ZZcnf+0VOJGfFzroFTXSNXUr3Wl9FE+ABnM0yTb79JLi3cVOdKg2J9QgBT9BSq Ls3bnkQ5mh22EsRqkofXpYApdPjpkO5dk6cNU3RXa1TkOl6Wk/9K2dZF07CU+FYgt0mg RGikGqW7WymPRUo+SuXh9qnESv8VXZT4HSr/VQkqLCmbgkmOEHx7RODHd9UMuu0pWeJE Ixmgr8LbjW6e21LVV+2SVkbGCaMPudPWCmLi+Fqy0G2GQPgCP90GOTotDLV2cjp9gZfY rKiA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id n12si99222jat.1.2021.05.26.11.28.17; Wed, 26 May 2021 11:28:17 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235501AbhEZS3s (ORCPT + 7 others); Wed, 26 May 2021 14:29:48 -0400 Received: from foss.arm.com ([217.140.110.172]:48486 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232262AbhEZS3s (ORCPT ); Wed, 26 May 2021 14:29:48 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A8C691476; Wed, 26 May 2021 11:28:16 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id BFF8A3F73B; Wed, 26 May 2021 11:28:15 -0700 (PDT) From: Sudeep Holla To: devicetree@vger.kernel.org Cc: Sudeep Holla , linux-arm-kernel@lists.infradead.org, Rob Herring , Cristian Marussi , Florian Fainelli Subject: [PATCH 2/8] dt-bindings: firmware: arm, scmi: Move arm, scmi-shmem to json schema Date: Wed, 26 May 2021 19:28:01 +0100 Message-Id: <20210526182807.548118-3-sudeep.holla@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210526182807.548118-1-sudeep.holla@arm.com> References: <20210526182807.548118-1-sudeep.holla@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Move the SRAM and shared memory binding for SCMI into the existing Generic on-chip SRAM. We just need to update the compatible list and there-by remove the whole old text format binding for the same. Cc: Rob Herring Cc: Cristian Marussi Cc: Florian Fainelli Signed-off-by: Sudeep Holla --- .../devicetree/bindings/arm/arm,scmi.txt | 15 --------------- Documentation/devicetree/bindings/sram/sram.yaml | 1 + 2 files changed, 1 insertion(+), 15 deletions(-) -- 2.25.1 diff --git a/Documentation/devicetree/bindings/arm/arm,scmi.txt b/Documentation/devicetree/bindings/arm/arm,scmi.txt index 667d58e0a659..b7be2000afcb 100644 --- a/Documentation/devicetree/bindings/arm/arm,scmi.txt +++ b/Documentation/devicetree/bindings/arm/arm,scmi.txt @@ -106,21 +106,6 @@ signal binding[5]. - #reset-cells : Should be 1. Contains the reset domain ID value used by SCMI commands. -SRAM and Shared Memory for SCMI -------------------------------- - -A small area of SRAM is reserved for SCMI communication between application -processors and SCP. - -The properties should follow the generic mmio-sram description found in [4] - -Each sub-node represents the reserved area for SCMI. - -Required sub-node properties: -- reg : The base offset and size of the reserved area with the SRAM -- compatible : should be "arm,scmi-shmem" for Non-secure SRAM based - shared memory - [0] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/index.html [1] Documentation/devicetree/bindings/clock/clock-bindings.txt [2] Documentation/devicetree/bindings/power/power-domain.yaml diff --git a/Documentation/devicetree/bindings/sram/sram.yaml b/Documentation/devicetree/bindings/sram/sram.yaml index e9946ed15964..364d66db1b03 100644 --- a/Documentation/devicetree/bindings/sram/sram.yaml +++ b/Documentation/devicetree/bindings/sram/sram.yaml @@ -80,6 +80,7 @@ description: |+ - amlogic,meson8b-smp-sram - amlogic,meson-gxbb-scp-shmem - amlogic,meson-axg-scp-shmem + - arm,scmi-shmem - arm,scpi-shmem - renesas,smp-sram - rockchip,rk3066-smp-sram