From patchwork Thu Aug 12 20:41:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Geis X-Patchwork-Id: 496741 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0166DC432BE for ; Thu, 12 Aug 2021 20:42:27 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id D73B2610A8 for ; Thu, 12 Aug 2021 20:42:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232648AbhHLUmv (ORCPT ); Thu, 12 Aug 2021 16:42:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50214 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238021AbhHLUmg (ORCPT ); Thu, 12 Aug 2021 16:42:36 -0400 Received: from mail-qk1-x72c.google.com (mail-qk1-x72c.google.com [IPv6:2607:f8b0:4864:20::72c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0CC3DC0612A5; Thu, 12 Aug 2021 13:42:05 -0700 (PDT) Received: by mail-qk1-x72c.google.com with SMTP id az7so8272924qkb.5; Thu, 12 Aug 2021 13:42:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iWmyzD0AHOmumLrqKa3ZHpzPnn/EcIn8wTUKFzr+kYQ=; b=hmVe7sT1hGvRwzQ/slSq+rQUvVQrRh1nihHPENrDIwE45CYMPD1Z/x4jTcP/THIFWH L7dvuCIKD6w0WovygtCTVvp9YRhyNeh7Y2h1/qCUaf+lEhfhO1BIZVJstUNTgzsSXTjN M78TsYn3IbNYZYNOCoXzs2OCAEAI12RYEl3+NPbER6ZEyHLk5gZlX8OnVpHLMaiLkOEP 18ywaxXNt7T0LZ6g8naFFBHJJwc3lJuQMzGEndkIwptE9RHU7M0ubYe7o9Leol5I/7Mp DK9kKQ3xw+v4Qs3GvVaEwUYraILJ60aZvNV0Qphx7TLCaAv+IKfTyA4T3lmEMHFwF9UE Kt2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iWmyzD0AHOmumLrqKa3ZHpzPnn/EcIn8wTUKFzr+kYQ=; b=hlvvvw3aNT0S03nQZMng7tfGZADrv5YdpWu1bfOEjjFipkq6QwHbUk4ghfEgObLGA5 Szq59SvrsaEPdmBTnnBoahuoJSIVgwPuxusm2f0NNYEGEympyPEB22gSi9F7qqY0O+t+ B927oyq2OIIhI/iID2lZkcXDQGR7Ng3kywjfa9KpTIU7aQ1HowjAU0vb4e5GFvb7FLtO hXMUjB5x8KmW6ux5PYs9wq3sMQ+GL7KbBjvNVexoKlPrxq2zdKo3krueAjPo0slwdCgj Sf1S70iuH3lqbZuwhgHhHl1m8egCF7V1LmOgFw2qQKvFrvDTNvsJB7vh19ZppQgP9z+k prCQ== X-Gm-Message-State: AOAM532IePJYeCJnbJqau+svh6kBeuIsCM7tUEqVP+S+R1EOxQRCM2WK 3awge/pXwuYOtMolOL+e/FQ= X-Google-Smtp-Source: ABdhPJy4HK8JMBANtT1Uwyh3IIemb3X75giy3d/8yXVQoIEBVbULOvqq2B9tZfz3t2WBRgS8QeVx9Q== X-Received: by 2002:a05:620a:5b7:: with SMTP id q23mr6568553qkq.386.1628800924115; Thu, 12 Aug 2021 13:42:04 -0700 (PDT) Received: from master-laptop.sparksnet ([2601:153:980:85b1:e89f:d077:9161:1bd7]) by smtp.gmail.com with ESMTPSA id m16sm1940361qki.19.2021.08.12.13.42.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Aug 2021 13:42:03 -0700 (PDT) From: Peter Geis To: Rob Herring , Heiko Stuebner Cc: Peter Geis , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 7/8] arm64: dts: rockchip: add usb2 nodes to rk3568 device tree Date: Thu, 12 Aug 2021 16:41:15 -0400 Message-Id: <20210812204116.2303617-8-pgwipeout@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210812204116.2303617-1-pgwipeout@gmail.com> References: <20210812204116.2303617-1-pgwipeout@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add the requisite nodes to the rk3568 device tree to enable the usb2 device controllers. Includes the usb2phy nodes, usb2phy grf nodes, and usb2 controller nodes. Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 98 ++++++++++++++++++++++++ 1 file changed, 98 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 322971318d5a..2abd9241c91f 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -200,6 +200,50 @@ gic: interrupt-controller@fd400000 { msi-controller; }; + usb_host0_ehci: usb@fd800000 { + compatible = "generic-ehci"; + reg = <0x0 0xfd800000 0x0 0x40000>; + interrupts = ; + clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>, + <&cru PCLK_USB>; + phys = <&u2phy1_otg>; + phy-names = "usb"; + status = "disabled"; + }; + + usb_host0_ohci: usb@fd840000 { + compatible = "generic-ohci"; + reg = <0x0 0xfd840000 0x0 0x40000>; + interrupts = ; + clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>, + <&cru PCLK_USB>; + phys = <&u2phy1_otg>; + phy-names = "usb"; + status = "disabled"; + }; + + usb_host1_ehci: usb@fd880000 { + compatible = "generic-ehci"; + reg = <0x0 0xfd880000 0x0 0x40000>; + interrupts = ; + clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>, + <&cru PCLK_USB>; + phys = <&u2phy1_host>; + phy-names = "usb"; + status = "disabled"; + }; + + usb_host1_ohci: usb@fd8c0000 { + compatible = "generic-ohci"; + reg = <0x0 0xfd8c0000 0x0 0x40000>; + interrupts = ; + clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>, + <&cru PCLK_USB>; + phys = <&u2phy1_host>; + phy-names = "usb"; + status = "disabled"; + }; + pmugrf: syscon@fdc20000 { compatible = "rockchip,rk3568-pmugrf", "syscon", "simple-mfd"; reg = <0x0 0xfdc20000 0x0 0x10000>; @@ -210,6 +254,16 @@ grf: syscon@fdc60000 { reg = <0x0 0xfdc60000 0x0 0x10000>; }; + usb2phy0_grf: syscon@fdca0000 { + compatible = "rockchip,rk3568-usb2phy-grf", "syscon"; + reg = <0x0 0xfdca0000 0x0 0x8000>; + }; + + usb2phy1_grf: syscon@fdca8000 { + compatible = "rockchip,rk3568-usb2phy-grf", "syscon"; + reg = <0x0 0xfdca8000 0x0 0x8000>; + }; + pmucru: clock-controller@fdd00000 { compatible = "rockchip,rk3568-pmucru"; reg = <0x0 0xfdd00000 0x0 0x1000>; @@ -738,6 +792,50 @@ saradc: saradc@fe720000 { status = "disabled"; }; + usb2phy0: usb2-phy@fe8a0000 { + compatible = "rockchip,rk3568-usb2phy"; + reg = <0x0 0xfe8a0000 0x0 0x10000>; + clocks = <&pmucru CLK_USBPHY0_REF>; + clock-names = "phyclk"; + clock-output-names = "clk_usbphy0_480m"; + interrupts = ; + rockchip,usbgrf = <&usb2phy0_grf>; + #clock-cells = <0>; + status = "disabled"; + + u2phy0_host: host-port { + #phy-cells = <0>; + status = "disabled"; + }; + + u2phy0_otg: otg-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + + usb2phy1: usb2-phy@fe8b0000 { + compatible = "rockchip,rk3568-usb2phy"; + reg = <0x0 0xfe8b0000 0x0 0x10000>; + clocks = <&pmucru CLK_USBPHY1_REF>; + clock-names = "phyclk"; + clock-output-names = "clk_usbphy1_480m"; + interrupts = ; + rockchip,usbgrf = <&usb2phy1_grf>; + #clock-cells = <0>; + status = "disabled"; + + u2phy1_host: host-port { + #phy-cells = <0>; + status = "disabled"; + }; + + u2phy1_otg: otg-port { + #phy-cells = <0>; + status = "disabled"; + }; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3568-pinctrl"; rockchip,grf = <&grf>;