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[79.47.249.147]) by smtp.googlemail.com with ESMTPSA id w6-20020a5d6806000000b002036515dda7sm2396699wru.33.2022.03.09.11.15.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Mar 2022 11:15:15 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith , Jonathan McDowell Subject: [PATCH v3 01/18] ARM: dts: qcom: add multiple missing pin definition for ipq8064 Date: Wed, 9 Mar 2022 20:01:35 +0100 Message-Id: <20220309190152.7998-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220309190152.7998-1-ansuelsmth@gmail.com> References: <20220309190152.7998-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add missing definition for mdio0 pins used for gpio-bitbang driver,i2c4 pins and rgmii2 pins for ipq8064. Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 11481313bdb6..cc6ca9013ab1 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -382,6 +382,15 @@ mux { }; }; + i2c4_pins: i2c4_pinmux { + mux { + pins = "gpio12", "gpio13"; + function = "gsbi4"; + drive-strength = <12>; + bias-disable; + }; + }; + spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; @@ -424,6 +433,8 @@ mux { pullups { pins = "gpio39"; + function = "nand"; + drive-strength = <10>; bias-pull-up; }; @@ -431,9 +442,32 @@ hold { pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47"; + function = "nand"; + drive-strength = <10>; bias-bus-hold; }; }; + + mdio0_pins: mdio0_pins { + mux { + pins = "gpio0", "gpio1"; + function = "mdio"; + drive-strength = <8>; + bias-disable; + }; + }; + + rgmii2_pins: rgmii2_pins { + mux { + pins = "gpio27", "gpio28", "gpio29", + "gpio30", "gpio31", "gpio32", + "gpio51", "gpio52", "gpio59", + "gpio60", "gpio61", "gpio62"; + function = "rgmii2"; + drive-strength = <8>; + bias-disable; + }; + }; }; intc: interrupt-controller@2000000 {