From patchwork Fri Mar 18 20:25:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 552675 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83361C433F5 for ; Fri, 18 Mar 2022 20:26:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240609AbiCRU1R (ORCPT ); Fri, 18 Mar 2022 16:27:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57328 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240586AbiCRU1P (ORCPT ); Fri, 18 Mar 2022 16:27:15 -0400 Received: from ssl.serverraum.org (ssl.serverraum.org [IPv6:2a01:4f8:151:8464::1:2]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EEFFA28CA96; Fri, 18 Mar 2022 13:25:55 -0700 (PDT) Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id EEAE5223F7; Fri, 18 Mar 2022 21:25:53 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1647635154; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=tYqLzTM+PgVgCGYTteyksCDNUwqgACT77UqZ07efI+o=; b=JOOx3rS5sUK0fw87yD6OzHwGUR10Iuz7LZCtf9rK4uwhQfCd9Gr8fUU52M7dM5RFyCkbDW t9nymO/iRxSGiXfFed1Dt4vRCzpE/x9zfDLn5VVHXjhFEYj3xWBnccKHbR/OWVN4Mzg2y9 VTDZ4KaYtjDtDgoibjdb/mB1El+s3bk= From: Michael Walle To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Lars Povlsen , Steen Hegelund , Thomas Bogendoerfer , Gregory CLEMENT , Paul Burton , Quentin Schulz , Antoine Tenart , Kavyasree Kotagiri , Nicolas Ferre Cc: "David S . Miller" , UNGLinuxDriver@microchip.com, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mips@vger.kernel.org, Michael Walle Subject: [PATCH v2 3/8] MIPS: mscc: ocelot: fix PHY interrupt pinctrl node name Date: Fri, 18 Mar 2022 21:25:42 +0100 Message-Id: <20220318202547.1650687-4-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220318202547.1650687-1-michael@walle.cc> References: <20220318202547.1650687-1-michael@walle.cc> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The pinctrl device tree binding will be converted to YAML format. All the pin nodes should end with "-pins". Fix them. Fixes: 116edf6e5239 ("MIPS: mscc: add DT for Ocelot PCB120") Signed-off-by: Michael Walle --- arch/mips/boot/dts/mscc/ocelot_pcb120.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/boot/dts/mscc/ocelot_pcb120.dts b/arch/mips/boot/dts/mscc/ocelot_pcb120.dts index 9d6b5717befb..cda6c5ff58ad 100644 --- a/arch/mips/boot/dts/mscc/ocelot_pcb120.dts +++ b/arch/mips/boot/dts/mscc/ocelot_pcb120.dts @@ -22,7 +22,7 @@ memory@0 { }; &gpio { - phy_int_pins: phy_int_pins { + phy_int_pins: phy-int-pins { pins = "GPIO_4"; function = "gpio"; };