From patchwork Tue Jul 5 21:52:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 587588 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9DC7CCCA483 for ; Tue, 5 Jul 2022 21:52:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232587AbiGEVwd (ORCPT ); Tue, 5 Jul 2022 17:52:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39388 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232598AbiGEVwc (ORCPT ); Tue, 5 Jul 2022 17:52:32 -0400 Received: from mail-wm1-x32c.google.com (mail-wm1-x32c.google.com [IPv6:2a00:1450:4864:20::32c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ECD3717E22 for ; Tue, 5 Jul 2022 14:52:30 -0700 (PDT) Received: by mail-wm1-x32c.google.com with SMTP id r81-20020a1c4454000000b003a0297a61ddso10517045wma.2 for ; Tue, 05 Jul 2022 14:52:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=conchuod.ie; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2GzPXU6fxlhRLcLCzHAtBw9aqp9IODNCeRsuQO5lcpY=; b=XT7ASFf1nIxEfdXiclNYpFSfVq9s4C412d1OLgO/lRLR31n5QoYTHi2w0+p6vqybbX L8rsroWGHmISyxXwTMLY5Pxl0TOG8uaNtgvh3ABkRgQei276FZRvd10cHmCHvrO97nSs X1TOJ070+O3zWigaRb5S9HsAQ7feSkeZGigRifEXpzQYhOCweEjRkKfebf8ovWlSg9Sm MATg8gxg3oOtY6sR8l+nawtwKUugNgrjxosw3dX9AbAQmizt8wGPJ0C0+p2XxxuR4VYQ cB+b97WOaIvDgK7CYap6O6H46outSUnrjdgeLqMg7CbGejFauZTBHZWOALqxV0SFuBD2 cSQg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2GzPXU6fxlhRLcLCzHAtBw9aqp9IODNCeRsuQO5lcpY=; b=0m3FthmAaJu9axCXG9u3bJbeFhUv5dsdjyblKlfEsXg2LASEetY4aWGUzTYLxre4Fq WRzH2vpXi+1hGpP0nOptRGIpunCVec15WO8StSRvSe3Up5SNsTguMdmXSGOz7lTUdGv+ IQ2fs1SMNSYf8bunYWeMX2TZ3fEJG6gH9SUFUrBIwuCPf1g8yS6wel96v+lbDRKmk1xp Gh33vsZ1+ikdHaB8LlYaXIwSuaFjNrYzNmlKkiSZfDW05YtL9I9MciOugZ9rBogaR4zz hXJ9ne9ikrtRZ6vErzWrLNAD5hb8M4X0dfhbl1ZrYzQbe8gyNr10VS2TP31IoqXvEzk6 gElg== X-Gm-Message-State: AJIora/ECXcEGfpuG8xXYTQ5xnQM/o3IPalMx1In4CstshSAcKBJgx9A Tlrhes3a4qIqXjS0RM4Br7kHSg== X-Google-Smtp-Source: AGRyM1uhOixFRoKPZ9r+xlFuyTA+0x5iwS5mflmn1FfFUubL8NnF+MTFXr4CI29OWbYvLWfq3Ui0Iw== X-Received: by 2002:a7b:ce0e:0:b0:3a0:4623:86b7 with SMTP id m14-20020a7bce0e000000b003a0462386b7mr39641466wmc.62.1657057949473; Tue, 05 Jul 2022 14:52:29 -0700 (PDT) Received: from henark71.. ([51.37.234.167]) by smtp.gmail.com with ESMTPSA id g34-20020a05600c4ca200b0039c7dbafa7asm18353920wmp.19.2022.07.05.14.52.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jul 2022 14:52:29 -0700 (PDT) From: Conor Dooley To: David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Thierry Reding , Sam Ravnborg , Eugeniy Paltsev , Vinod Koul , Serge Semin , Daniel Lezcano , Palmer Dabbelt , Palmer Dabbelt Cc: Paul Walmsley , Albert Ou , Conor Dooley , Masahiro Yamada , Damien Le Moal , Geert Uytterhoeven , Niklas Cassel , Dillon Min , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v5 04/13] dt-bindings: memory-controllers: add canaan k210 sram controller Date: Tue, 5 Jul 2022 22:52:05 +0100 Message-Id: <20220705215213.1802496-5-mail@conchuod.ie> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220705215213.1802496-1-mail@conchuod.ie> References: <20220705215213.1802496-1-mail@conchuod.ie> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Conor Dooley The k210 U-Boot port has been using the clocks defined in the devicetree to bring up the board's SRAM, but this violates the dt-schema. As such, move the clocks to a dedicated node with the same compatible string & document it. Signed-off-by: Conor Dooley --- .../memory-controllers/canaan,k210-sram.yaml | 52 +++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml diff --git a/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml new file mode 100644 index 000000000000..f81fb866e319 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Canaan K210 SRAM memory controller + +description: + The Canaan K210 SRAM memory controller is responsible for the system's 8 MiB + of SRAM. The controller is initialised by the bootloader, which configures + its clocks, before OS bringup. + +maintainers: + - Conor Dooley + +properties: + compatible: + enum: + - canaan,k210-sram + + clocks: + minItems: 1 + items: + - description: sram0 clock + - description: sram1 clock + - description: aisram clock + + clock-names: + minItems: 1 + items: + - const: sram0 + - const: sram1 + - const: aisram + +required: + - compatible + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + memory-controller { + compatible = "canaan,k210-sram"; + clocks = <&sysclk K210_CLK_SRAM0>, + <&sysclk K210_CLK_SRAM1>, + <&sysclk K210_CLK_AI>; + clock-names = "sram0", "sram1", "aisram"; + };