From patchwork Tue Jul 26 23:03:28 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiucheng Xu X-Patchwork-Id: 593839 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6834DC19F29 for ; Tue, 26 Jul 2022 23:03:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239904AbiGZXDv (ORCPT ); Tue, 26 Jul 2022 19:03:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54076 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232500AbiGZXDu (ORCPT ); Tue, 26 Jul 2022 19:03:50 -0400 Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 117CD1EADC; Tue, 26 Jul 2022 16:03:49 -0700 (PDT) Received: from droid01-xa.amlogic.com (10.88.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2176.14; Wed, 27 Jul 2022 07:03:42 +0800 From: Jiucheng Xu To: , , , CC: Rob Herring , Krzysztof Kozlowski , Will Deacon , Mark Rutland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Chris Healy , Jiucheng Xu Subject: [PATCH v2 3/4] arm64: dts: meson: Add DDR PMU node Date: Wed, 27 Jul 2022 07:03:28 +0800 Message-ID: <20220726230329.2844101-3-jiucheng.xu@amlogic.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220726230329.2844101-1-jiucheng.xu@amlogic.com> References: <20220726230329.2844101-1-jiucheng.xu@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.88.11.200] Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DDR PMU device node for G12 series SoC Signed-off-by: Jiucheng Xu --- Changes v1 -> v2: - Remove model, dmc_nr, chann_nr properties - Add g12a-ddr-pmu, g12b-ddr-pmu, sm1-ddr-pmu compatibles as identifier --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 7 +++++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 4 ++++ arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 4 ++++ arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 ++++ 4 files changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index 45947c1031c4..7e556fe575be 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -2146,6 +2146,13 @@ hdmi_tx_out: endpoint { }; }; + ddr_pmu: ddr_pmu@ff638000 { + compatible = "amlogic,g12-ddr-pmu"; + reg = <0x0 0xff638000 0x0 0x100 + 0x0 0xff638c00 0x0 0x100>; + interrupts = ; + }; + gic: interrupt-controller@ffc01000 { compatible = "arm,gic-400"; reg = <0x0 0xffc01000 0 0x1000>, diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index fb0ab27d1f64..4a32e081e70e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -133,3 +133,7 @@ map1 { }; }; }; + +&ddr_pmu { + compatible = "amlogic,g12a-ddr-pmu"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi index ee8fcae9f9f0..d91eca5a9afc 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi @@ -139,3 +139,7 @@ map1 { &mali { dma-coherent; }; + +&ddr_pmu { + compatible = "amlogic,g12b-ddr-pmu"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi index 80737731af3f..7d62c661fde5 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -543,3 +543,7 @@ &vpu { &usb { power-domains = <&pwrc PWRC_SM1_USB_ID>; }; + +&ddr_pmu { + compatible = "amlogic,sm1-ddr-pmu"; +};