From patchwork Fri Aug 19 23:14:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 599033 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 622FDC32789 for ; Fri, 19 Aug 2022 23:14:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241715AbiHSXOe (ORCPT ); Fri, 19 Aug 2022 19:14:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39690 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240711AbiHSXOc (ORCPT ); Fri, 19 Aug 2022 19:14:32 -0400 Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B6D6D31E8 for ; Fri, 19 Aug 2022 16:14:30 -0700 (PDT) Received: by mail-wr1-x42b.google.com with SMTP id e20so6221678wri.13 for ; Fri, 19 Aug 2022 16:14:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=conchuod.ie; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc; bh=vN0DGeJfb4elpBHq3mALobUym6adR42yLX1wd+NKgEE=; b=gCzTdWMPXSugSg9LBMqCSeD3JplhT7DIWaAbxBe7JlQULZyIYqyUNrHUrxqRv1nF0O IlFWgdYpoXqtffeSgF9cKPNsxJpUpc/ijbHjw7YRoPH9w3KpI/SLogztqwUGA14d3my0 d4NJZCxPDt7vfVLMkJiCIns7c4tsFotmJEjMyJF/FrXxOAJhMjWYyQ8U5tovJyt/MirR VoTiA0Zp75abJqzzT0sClBB3tJwSPQS7fQNkRkq7U8MZgXY4t+EmEaY+WTcZJdMj/PBL UUFsOfiW3XCqKP0n9OSN5aLI1LVtUp9Vu7bz+TJ+3yFGhSr84TNfBlK4kNtu6s+kjHjM H9AQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc; bh=vN0DGeJfb4elpBHq3mALobUym6adR42yLX1wd+NKgEE=; b=obToMp8yt41LcI+p9a3mqV+ZqtzGKKQ61tJASMkFXfLp4lj8hjpN6/arc7r0trghNF z1S2M1XllbA99wuvbVOWI3T50P21zwPoCJooIRrtcNta2Pzedgw8LMq84QCad9Z/5wuG jL02Gr+F6SJeXITWt4et/m9w1z2WRnhPSsEpYuAUyz9x4lfMF5dWx7UT6T5UhgpwsG1d bPRxPO13QbqaXjWhyoD3F54PMwkBe4HSI11mn2jr8h8COEA28YBJl6f7G9wVF3NXcjF8 hWF0RDfKYhFA5TliXguwCdUwyTps3j79Ab50GT7wQuxWLTLyJR9q9R5OCEjCFp5Z0c8+ MaQw== X-Gm-Message-State: ACgBeo0fIK7ix8EpBsDni+EYg+jIVuyzowDAl3U07CX/fDbB3m+ltk3q zq+aI/5ivJsJPh09D/FxZbhbsA== X-Google-Smtp-Source: AA6agR5RqrcGo/ilIWgn0sQMbkFC+AIrrHqX1XG5e4BktUFXFPfuB61xoV/CrtIzIW8k7+CP+vOMKA== X-Received: by 2002:a05:6000:144a:b0:220:7181:9283 with SMTP id v10-20020a056000144a00b0022071819283mr5097105wrx.158.1660950868698; Fri, 19 Aug 2022 16:14:28 -0700 (PDT) Received: from henark71.. ([109.76.58.63]) by smtp.gmail.com with ESMTPSA id g17-20020a5d46d1000000b0020fff0ea0a3sm5198522wrs.116.2022.08.19.16.14.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 Aug 2022 16:14:28 -0700 (PDT) From: Conor Dooley To: Daire McNamara , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Greentime Hu , Palmer Dabbelt , Albert Ou , Lorenzo Pieralisi , Conor Dooley Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v3 4/7] riscv: dts: microchip: mpfs: fix incorrect pcie child node name Date: Sat, 20 Aug 2022 00:14:13 +0100 Message-Id: <20220819231415.3860210-5-mail@conchuod.ie> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220819231415.3860210-1-mail@conchuod.ie> References: <20220819231415.3860210-1-mail@conchuod.ie> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Conor Dooley Recent versions of dt-schema complain about the PCIe controller's child node name: arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dtb: pcie@2000000000: Unevaluated properties are not allowed ('clock-names', 'clocks', 'legacy-interrupt-controller', 'microchip,axi-m-atr0' were unexpected) From schema: Documentation/devicetree/bindings/pci/microchip,pcie-host.yaml Make the dts match the correct property name in the dts. Fixes: 528a5b1f2556 ("riscv: dts: microchip: add new peripherals to icicle kit device tree") Signed-off-by: Conor Dooley --- v2022.08 of dt-schema is required to replicate. --- arch/riscv/boot/dts/microchip/mpfs.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/boot/dts/microchip/mpfs.dtsi b/arch/riscv/boot/dts/microchip/mpfs.dtsi index 499c2e63ad35..e69322f56516 100644 --- a/arch/riscv/boot/dts/microchip/mpfs.dtsi +++ b/arch/riscv/boot/dts/microchip/mpfs.dtsi @@ -487,7 +487,7 @@ pcie: pcie@2000000000 { msi-controller; microchip,axi-m-atr0 = <0x10 0x0>; status = "disabled"; - pcie_intc: legacy-interrupt-controller { + pcie_intc: interrupt-controller { #address-cells = <0>; #interrupt-cells = <1>; interrupt-controller;