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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id u18-20020a05651c131200b00261e7e7b698sm3075777lja.123.2022.09.08.01.10.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Sep 2022 01:10:56 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 4/5] arm64: dts: qcom: sa8295p-adp: add fallback compatible to PMIC GPIOs Date: Thu, 8 Sep 2022 10:10:49 +0200 Message-Id: <20220908081050.29751-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220908081050.29751-1-krzysztof.kozlowski@linaro.org> References: <20220908081050.29751-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Bindings require all PMIC GPIO nodes to have two compatibles - specific followed by SPMI or SSBI fallback: qcom/sa8295p-adp.dtb: pmic@8: gpio@c000:compatible: ['qcom,pm8150-gpio'] is too short Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sa8295p-adp.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts index ca5f5ad32ce5..98f8420488b6 100644 --- a/arch/arm64/boot/dts/qcom/sa8295p-adp.dts +++ b/arch/arm64/boot/dts/qcom/sa8295p-adp.dts @@ -183,7 +183,7 @@ pm8450a: pmic@0 { #size-cells = <0>; pm8450a_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio"; + compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; #gpio-cells = <2>; @@ -199,7 +199,7 @@ pm8450c: pmic@4 { #size-cells = <0>; pm8450c_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio"; + compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; #gpio-cells = <2>; @@ -215,7 +215,7 @@ pm8450e: pmic@8 { #size-cells = <0>; pm8450e_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio"; + compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; #gpio-cells = <2>; @@ -231,7 +231,7 @@ pm8450g: pmic@c { #size-cells = <0>; pm8450g_gpios: gpio@c000 { - compatible = "qcom,pm8150-gpio"; + compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio"; reg = <0xc000>; gpio-controller; #gpio-cells = <2>;