From patchwork Sat Sep 24 15:28:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Kocialkowski X-Patchwork-Id: 608908 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D723DC07E9D for ; Sat, 24 Sep 2022 15:28:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233846AbiIXP2s (ORCPT ); Sat, 24 Sep 2022 11:28:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45236 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233791AbiIXP2k (ORCPT ); Sat, 24 Sep 2022 11:28:40 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C721AC259; Sat, 24 Sep 2022 08:28:39 -0700 (PDT) Received: (Authenticated sender: paul.kocialkowski@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 374E31C000A; Sat, 24 Sep 2022 15:28:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1664033316; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ju5do/c+OU4kfvBHwzg0j4ZuAfxqRDSsXxFditf0h1s=; b=BxT1eyMfFb+EgtJZj6haIWbHi73fzBVT5tD9KcsiM4zsTdSR7s324Ul1yehmMmDd1FIjpM 0yEhRA/vlJELgdv9cKt5RSaV6ejBpGdh8VKSQ/6QDHVwzFTcbk1+NsKMUAgk7WhfBe1ez7 2+UQ2m4UsblFunPxXINPAI0t/4vqcI+hlBKBxUXEcdaE+Mkf4mlmozeyNRbqiSJTLRc7nR JFOjZ7t/+jDkeMGlPVJvib6hbrXJn0iExmI9KskkASfdB7A14bGOXIVElvWk0CcjctuB1N f+tHz3ojTkAi19ADdTG6PFswHnDBCrVMc6OWH7IJRobYMpKSxyVZVnNCeSIqzA== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: Rob Herring , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Frank Rowand , Maxime Ripard , Laurent Pinchart , Thomas Petazzoni , Paul Kocialkowski Subject: [PATCH v6 5/7] ARM: dts: sun8i: a83t: Add MIPI CSI-2 controller node Date: Sat, 24 Sep 2022 17:28:18 +0200 Message-Id: <20220924152820.77149-6-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> References: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org MIPI CSI-2 is supported on the A83T with a dedicated controller that covers both the protocol and D-PHY. It is connected to the only CSI receiver with a fwnode graph link. Note that the CSI receiver supports both this MIPI CSI-2 source and a parallel source. An empty port with a label for the MIPI CSI-2 sensor input is also defined for convenience. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/sun8i-a83t.dtsi | 43 +++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi index 82fdb04122ca..bbe01877a938 100644 --- a/arch/arm/boot/dts/sun8i-a83t.dtsi +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi @@ -1062,6 +1062,49 @@ csi: camera@1cb0000 { clock-names = "bus", "mod", "ram"; resets = <&ccu RST_BUS_CSI>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + csi_in_mipi_csi2: endpoint { + remote-endpoint = <&mipi_csi2_out_csi>; + }; + }; + }; + }; + + mipi_csi2: csi@1cb1000 { + compatible = "allwinner,sun8i-a83t-mipi-csi2"; + reg = <0x01cb1000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_CSI>, + <&ccu CLK_CSI_SCLK>, + <&ccu CLK_MIPI_CSI>, + <&ccu CLK_CSI_MISC>; + clock-names = "bus", "mod", "mipi", "misc"; + resets = <&ccu RST_BUS_CSI>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mipi_csi2_in: port@0 { + reg = <0>; + }; + + mipi_csi2_out: port@1 { + reg = <1>; + + mipi_csi2_out_csi: endpoint { + remote-endpoint = <&csi_in_mipi_csi2>; + }; + }; + }; }; hdmi: hdmi@1ee0000 {