From patchwork Tue Nov 1 14:16:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andre Przywara X-Patchwork-Id: 620522 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4952C43217 for ; Tue, 1 Nov 2022 14:17:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230266AbiKAORV (ORCPT ); Tue, 1 Nov 2022 10:17:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230249AbiKAORS (ORCPT ); Tue, 1 Nov 2022 10:17:18 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 800AC1B1FB; Tue, 1 Nov 2022 07:17:17 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 937F523A; Tue, 1 Nov 2022 07:17:23 -0700 (PDT) Received: from donnerap.arm.com (donnerap.cambridge.arm.com [10.1.197.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BFD553F703; Tue, 1 Nov 2022 07:17:15 -0700 (PDT) From: Andre Przywara To: Jernej Skrabec , Samuel Holland , Chen-Yu Tsai , Rob Herring , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-sunxi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Icenowy Zheng , Mauro Carvalho Chehab , linux-media@vger.kernel.org Subject: [PATCH 6/9] dt-bindings: media: IR: Add F1C100s IR compatible string Date: Tue, 1 Nov 2022 14:16:55 +0000 Message-Id: <20221101141658.3631342-7-andre.przywara@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221101141658.3631342-1-andre.przywara@arm.com> References: <20221101141658.3631342-1-andre.przywara@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The CIR controller in the Allwinner F1C100s series of SoCs is compatible to the ones used in other Allwinner SoCs. Add the respective compatible name to the existing IR binding, and pair it with the A31 fallback compatible string. Signed-off-by: Andre Przywara --- .../devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml index 704033e21ee80..53945c61325c7 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml @@ -21,6 +21,7 @@ properties: - const: allwinner,sun6i-a31-ir - items: - enum: + - allwinner,suniv-f1c100s-ir - allwinner,sun8i-a83t-ir - allwinner,sun8i-r40-ir - allwinner,sun50i-a64-ir