From patchwork Tue Feb 28 16:47:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 657547 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D2AAC6FA8E for ; Tue, 28 Feb 2023 16:49:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229964AbjB1Qt3 (ORCPT ); Tue, 28 Feb 2023 11:49:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40388 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229970AbjB1Qt1 (ORCPT ); Tue, 28 Feb 2023 11:49:27 -0500 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A73192CC4A for ; Tue, 28 Feb 2023 08:48:46 -0800 (PST) Received: by mail-pj1-x1031.google.com with SMTP id oj5so6496689pjb.5 for ; Tue, 28 Feb 2023 08:48:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2eEMB9s5VCpJlF9KahYvaWlXJSQFG2Rpw7o2twh3Yp4=; b=FQuMVxezTSRZiRV5XbRKPIaYLXP4B1Y3xCIXmpl9/LzT48Rm7keCfUTlCATPIUH/XV mablt9ofSz3ZxMN5qztABjuTS2KLkTpJzsqic3rbJk4Kxye9+sn3GgxmWYUzn5Roq4vP JduDPsRwxCalnhgQbGrqutA8D3d+H5z1E6iDXgKP/z6rjY+MtuA2xmKcNTQ+oA9RtQmN BYWMv/jnzfuwZevBi42gKSn0Jl2Aq06fF/KJ666tgZterkO0ywPkQ6j/WdDdPyh7huZe X56RATdR0zrQYI4fDd1VKTNy8yf1v0vEAQL01FIH2qVrZ84OHyLlijOt+/ot9zu9+uQy u+iw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2eEMB9s5VCpJlF9KahYvaWlXJSQFG2Rpw7o2twh3Yp4=; b=TXY9N5WLC7ROF5bSHyzKXrcqRqqlD6hdeyCSkmdne6qkGszE+Z/IbD8HbdMDPwXRbq xs0Sy01yO7VezuGMp2wHbYFjeQSKGJ65g6fQZC6y+pC7qcUVvBi6Xf4NKusOeL+t4MJj 1mccbWlxDNTVury+ABSjJoT/HQCFcVJIr8NO3n93hH23yFDpDzTQnQEI7JTrx7CgVMjO cRwk9qokQ+YPPBeX0tHr1t/gSGxPSv6CXr5eNkRepvvBioUmWforal66YnoYW8t02XCY XQrv5aZqFQSDwWuqy/dP+xkuNbbkzW10QFj2or7gMN2ii51XGjJzS4vT5elw5JOJch4m OwjA== X-Gm-Message-State: AO0yUKX/JtWdLnX8YBy02vM0wFU7Kc2h/RzGpT9v5KMSKEp6yiLGOjwd 3xhNADZx4f8CeGwXQuqxE01N X-Google-Smtp-Source: AK7set9KMqVsd6eMVqwnfYGpkyUkg18ps6Si1zK8tVHG6melJDr4hZN1JceEcyUtYMORaaVKOhU++A== X-Received: by 2002:a05:6a20:431d:b0:bc:8254:ddff with SMTP id h29-20020a056a20431d00b000bc8254ddffmr4842486pzk.1.1677602926154; Tue, 28 Feb 2023 08:48:46 -0800 (PST) Received: from localhost.localdomain ([103.197.115.185]) by smtp.gmail.com with ESMTPSA id z11-20020a6552cb000000b00476dc914262sm5908792pgp.1.2023.02.28.08.48.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Feb 2023 08:48:45 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org Cc: konrad.dybcio@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, arnd@arndb.de, Manivannan Sadhasivam Subject: [PATCH 11/16] arm64: dts: qcom: sm8150: Fix the PCI I/O port range Date: Tue, 28 Feb 2023 22:17:47 +0530 Message-Id: <20230228164752.55682-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> References: <20230228164752.55682-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI addresses (0x60200000, 0x40200000) specified in the ranges property for I/O region. While at it, let's use the missing 0x prefix for the addresses. Fixes: a1c86c680533 ("arm64: dts: qcom: sm8150: Add PCIe nodes") Reported-by: Arnd Bergmann Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/ Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index fd20096cfc6e..1fabfa05708c 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1799,8 +1799,8 @@ pcie0: pci@1c00000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x60200000 0 0x60200000 0x0 0x100000>, - <0x02000000 0x0 0x60300000 0 0x60300000 0x0 0x3d00000>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x60200000 0x0 0x100000>, + <0x02000000 0x0 0x60300000 0x0 0x60300000 0x0 0x3d00000>; interrupts = ; interrupt-names = "msi"; @@ -1895,7 +1895,7 @@ pcie1: pci@1c08000 { #address-cells = <3>; #size-cells = <2>; - ranges = <0x01000000 0x0 0x40200000 0x0 0x40200000 0x0 0x100000>, + ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>, <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>; interrupts = ;