From patchwork Wed Jul 12 02:40:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manikandan Muralidharan X-Patchwork-Id: 702050 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B3E57EB64DC for ; Wed, 12 Jul 2023 02:42:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231202AbjGLCmm (ORCPT ); Tue, 11 Jul 2023 22:42:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47340 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231830AbjGLCml (ORCPT ); Tue, 11 Jul 2023 22:42:41 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 02BE31BF1; Tue, 11 Jul 2023 19:42:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1689129732; x=1720665732; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=y8YGmAB0FJO0Fr02vL7F8m2+XfFscr3FdF3PNYJmVZ4=; b=ecUYlMH4Xbse7PPPSNI730dp4kcZDW5NHwH+In7utWdwIUZQ54dxW+Zj aePmxECJg1bJpNs/Tv5pyH5hsszk3Tq5YfG3iEsmtMFlAKxKmq89MsJIP iiIHyLTrTRHtWJafDDpbNPGexieeopz8lNZfaJ382uc/iJLNpHX75o4kW r52pRMlA+KVk2p6//fV7/srqmoTo0jqONhRgtYrFEmXcMAeaH0MTcBPYg kB/QNtVWebTHwz4c8Siz7FAGb8N8GhTkdGC8Emf9p70d55cZHTzriHNvP 31TUXiM6foUf1B/DJDkPy0fdSfQqc34BY491w+hfm/C/mvENKLKsvduKN A==; X-IronPort-AV: E=Sophos;i="6.01,198,1684825200"; d="scan'208";a="223259467" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 11 Jul 2023 19:42:03 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Tue, 11 Jul 2023 19:41:53 -0700 Received: from che-lt-i67131.amer.actel.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Tue, 11 Jul 2023 19:41:45 -0700 From: Manikandan Muralidharan To: , , , , , , , , , , , , , , CC: , , , , , , , Manikandan Muralidharan Subject: [PATCH v2 8/9] drm: atmel-hlcdc: add vertical and horizontal scaling support for XLCDC Date: Wed, 12 Jul 2023 08:10:16 +0530 Message-ID: <20230712024017.218921-9-manikandan.m@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230712024017.218921-1-manikandan.m@microchip.com> References: <20230712024017.218921-1-manikandan.m@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org update the LCDC_HEOCFG30 and LCDC_HEOCFG31 registers of XLCDC IP which supports vertical and horizontal scaling with Bilinear and Bicubic co-efficients taps for Chroma and Luma componenets of the Pixel. Signed-off-by: Manikandan Muralidharan --- drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 2 ++ drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h | 4 ++++ .../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 20 +++++++++++++++++++ 3 files changed, 26 insertions(+) diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c index d30aec174aa2..ae3e1a813482 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c @@ -536,6 +536,8 @@ static const struct atmel_hlcdc_layer_desc atmel_xlcdc_sam9x75_layers[] = { .general_config = 12, .csc = 16, .scaler_config = 23, + .vxs_config = 30, + .hxs_config = 31, }, .clut_offset = 0x1300, }, diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h index 8b05a54b5fd0..27074a4c5aec 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h @@ -198,6 +198,8 @@ * @disc_pos: discard area position register * @disc_size: discard area size register * @csc: color space conversion register + * @vxs_config: vertical scalar filter taps control register + * @hxs_config: horizontal scalar filter taps control register */ struct atmel_hlcdc_layer_cfg_layout { int xstride[ATMEL_HLCDC_LAYER_MAX_PLANES]; @@ -217,6 +219,8 @@ struct atmel_hlcdc_layer_cfg_layout { int disc_pos; int disc_size; int csc; + int vxs_config; + int hxs_config; }; /** diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c index 81f103b1a51f..b68075259053 100644 --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c @@ -978,6 +978,26 @@ static void xlcdc_csc_init(struct atmel_hlcdc_plane *plane, atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.csc + 6, 0x00000007); + + if (desc->layout.vxs_config && desc->layout.hxs_config) { + /* + * Updating vxs.config and hxs.config fixes the + * Green Color Issue in SAM9X7 EGT Video Player App + */ + atmel_hlcdc_layer_write_cfg(&plane->layer, + desc->layout.vxs_config, + ATMEL_XLCDC_LAYER_VXSYCFG_ONE | + ATMEL_XLCDC_LAYER_VXSYTAP2_ENABLE | + ATMEL_XLCDC_LAYER_VXSCCFG_ONE | + ATMEL_XLCDC_LAYER_VXSCTAP2_ENABLE); + + atmel_hlcdc_layer_write_cfg(&plane->layer, + desc->layout.hxs_config, + ATMEL_XLCDC_LAYER_HXSYCFG_ONE | + ATMEL_XLCDC_LAYER_HXSYTAP2_ENABLE | + ATMEL_XLCDC_LAYER_HXSCCFG_ONE | + ATMEL_XLCDC_LAYER_HXSCTAP2_ENABLE); + } } static int atmel_hlcdc_plane_init_properties(struct atmel_hlcdc_plane *plane)