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Wed, 12 Jul 2023 12:13:02 +0000 From: Pankaj Gupta To: shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, clin@suse.com, conor+dt@kernel.org, pierre.gondois@arm.com, ping.bai@nxp.com, xiaoning.wang@nxp.com, wei.fang@nxp.com, peng.fan@nxp.com, haibo.chen@nxp.com, festevam@gmail.com, linux-imx@nxp.com, davem@davemloft.net, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, gaurav.jain@nxp.com, alexander.stein@ew.tq-group.com, sahil.malhotra@nxp.com, aisheng.dong@nxp.com, V.Sethi@nxp.com Cc: Pankaj Gupta Subject: [PATCH v4 1/7] dt-bindings: arm: fsl: add se-fw binding doc Date: Wed, 12 Jul 2023 17:42:13 +0530 Message-Id: <20230712121219.2654234-2-pankaj.gupta@nxp.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230712121219.2654234-1-pankaj.gupta@nxp.com> References: <20230712121219.2654234-1-pankaj.gupta@nxp.com> X-ClientProxiedBy: SGXP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b8::36) To PAXPR04MB8638.eurprd04.prod.outlook.com (2603:10a6:102:21d::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PAXPR04MB8638:EE_|GVXPR04MB9877:EE_ X-MS-Office365-Filtering-Correlation-Id: 95b86f44-bc95-4cd3-fbc1-08db82d156d9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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This driver is enables communication ensuring well defined message sequence protocol between Application Core and enclave's firmware. Driver configures multiple misc-device on the MU, for multiple user-space applications can communicate on single MU. It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc. Signed-off-by: Pankaj Gupta --- .../bindings/arm/freescale/fsl,se-fw.yaml | 121 ++++++++++++++++++ 1 file changed, 121 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,se-fw.yaml diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,se-fw.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,se-fw.yaml new file mode 100644 index 000000000000..7567da0b4c21 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,se-fw.yaml @@ -0,0 +1,121 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/freescale/fsl,se-fw.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX EdgeLock Enclave Firmware (ELEFW) + +maintainers: + - Pankaj Gupta + +description: | + + The NXP's i.MX EdgeLock Enclave, a HW IP creating an embedded + secure enclave within the SoC boundary to enable features like + - HSM + - SHE + - V2X + + It uses message unit to communicate and coordinate to pass messages + (e.g., data, status and control) through its interfaces. + + This driver configures multiple misc-devices on the MU, to exchange + messages from User-space application and NXP's Edgelocke Enclave firmware. + The driver ensures that the messages must follow the following protocol + defined. + + Non-Secure + Secure + | + | + +---------+ +-------------+ | + | ele_mu.c+<---->+imx-mailbox.c| | + | | | mailbox.c +<-->+------+ +------+ + +---+-----+ +-------------+ | MU X +<-->+ ELE | + | +------+ +------+ + +----------------+ | + | | | + v v | + logical logical | + receiver waiter | + + + | + | | | + | | | + | +----+------+ | + | | | | + | | | | + device_ctx device_ctx device_ctx | + | + User 0 User 1 User Y | + +------+ +------+ +------+ | + |misc.c| |misc.c| |misc.c| | + kernel space +------+ +------+ +------+ | + | + +------------------------------------------------------ | + | | | | + userspace /dev/ele_muXch0 | | | + /dev/ele_muXch1 | | + /dev/ele_muXchY | + | + + When a user sends a command to the ELE, it registers its device_ctx as + waiter of a response from ELE. + + A user can be registered as receiver of command from the ELE. + Create char devices in /dev as channels of the form /dev/ele_muXchY with X + the id of the driver and Y for each users. It allows to send and receive + messages to the NXP EdgeLock Enclave IP on NXP SoC, where current possible + value, i.e., supported SoC(s) are imx8ulp, imx93. + +properties: + compatible: + enum: + - fsl,imx-ele + - fsl,imx93-ele + + mboxes: + description: + A list of phandles of TX MU channels followed by a list of phandles of + RX MU channels. The number of expected tx and rx channels is 1 TX, and + 1 RX channels. All MU channels must be within the same MU instance. + Cross instances are not allowed. The MU instance to be used is S4MUAP + for imx8ulp & imx93. Users need to ensure that used MU instance does not + conflict with other execution environments. + items: + - description: TX0 MU channel + - description: RX0 MU channel + + mbox-names: + items: + - const: tx + - const: rx + + fsl,mu-did: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Owner of message-unit, is identified via Domain ID or did. + + fsl,mu-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Identifier to the message-unit among the multiple message-unit that exists on SoC. + It is used to create the channels, default to 2 + + +required: + - compatible + - mboxes + - mbox-names + +additionalProperties: false + +examples: + - | + ele_mu: ele_mu { + compatible = "fsl,imx93-ele"; + mbox-names = "tx", "rx"; + mboxes = <&s4muap 2 0 + &s4muap 3 0>; + fsl,mu-did = <1>; + fsl,mu-id = <1>; + };