| Message ID | 20230825135613.282505-2-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted |
| Commit | 88fc274cb6c4bd643b0157db2602f685af57b846 |
| Headers | show |
| Series | [1/2] ARM: dts: qcom: apq8064: drop label property from DSI | expand |
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi index a1679f9f8f1e..9d9ac4e23831 100644 --- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi @@ -461,9 +461,9 @@ sdhc_1: mmc@8804000 { interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hc_irq", "pwr_irq"; - clocks = <&gcc GCC_SDCC1_APPS_CLK>, - <&gcc GCC_SDCC1_AHB_CLK>; - clock-names = "core", "iface"; + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>; + clock-names = "iface", "core"; status = "disabled"; };
Bindings expect clocks to be in different order: qcom-sdx65-mtp.dtb: mmc@8804000: clock-names:0: 'iface' was expected qcom-sdx65-mtp.dtb: mmc@8804000: clock-names:1: 'core' was expected Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)