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(unknown [10.28.34.196]) by maili.marvell.com (Postfix) with ESMTP id 65B435B6923; Fri, 29 Sep 2023 06:38:07 -0700 (PDT) From: Linu Cherian To: , , , CC: , , , , , , , , , Linu Cherian Subject: [PATCH 1/7] dt-bindings: arm: coresight-tmc: Add "memory-region" property Date: Fri, 29 Sep 2023 19:07:48 +0530 Message-ID: <20230929133754.857678-2-lcherian@marvell.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230929133754.857678-1-lcherian@marvell.com> References: <20230929133754.857678-1-lcherian@marvell.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: __Ur6xmz_8T-UUGjlVNa4bhXivX1C75M X-Proofpoint-GUID: __Ur6xmz_8T-UUGjlVNa4bhXivX1C75M X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-29_11,2023-09-28_03,2023-05-22_02 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net memory-region 0: Reserved trace buffer memory TMC ETR: When available, use this reserved memory region for trace data capture. Same region is used for trace data retention after a panic or watchdog reset. TMC ETF: When available, use this reserved memory region for trace data retention synced from internal SRAM after a panic or watchdog reset. memory-region 1: Reserved meta data memory TMC ETR, ETF: When available, use this memory for register snapshot retention synced from hardware registers after a panic or watchdog reset. Signed-off-by: Linu Cherian --- .../bindings/arm/arm,coresight-tmc.yaml | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml index cb8dceaca70e..45ca4d02d73e 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml @@ -101,6 +101,22 @@ properties: and ETF configurations. $ref: /schemas/graph.yaml#/properties/port + memory-region: + items: + - description: Reserved trace buffer memory for ETR and ETF sinks. + For ETR, this reserved memory region is used for trace data capture. + Same region is used for trace data retention as well after a panic + or watchdog reset. + For ETF, this reserved memory region is used for retention of trace + data synced from internal SRAM after a panic or watchdog reset. + + - description: Reserved meta data memory. Used for ETR and ETF sinks. + + memory-region-names: + items: + - const: trace-mem + - const: metadata-mem + required: - compatible - reg @@ -115,6 +131,9 @@ examples: etr@20070000 { compatible = "arm,coresight-tmc", "arm,primecell"; reg = <0x20070000 0x1000>; + memory-region = <&etr_trace_mem_reserved>, + <&etr_mdata_mem_reserved>; + memory-region-names = "trace-mem", "metadata-mem"; clocks = <&oscclk6a>; clock-names = "apb_pclk";