From patchwork Wed Oct 11 12:54:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luo Jie X-Patchwork-Id: 732752 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3DE5963B5 for ; Wed, 11 Oct 2023 12:55:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="LVgDHsL/" Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1FA993; Wed, 11 Oct 2023 05:55:27 -0700 (PDT) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 39BCOE3G022363; Wed, 11 Oct 2023 12:55:12 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=ZuD+kzTK3GMqMh4cRFD6FbY1OqwfVp6oqKPDZbwG/ng=; b=LVgDHsL/iILINAO1W8a8fMG/gy0K9Zyf2ttc/aHHioaOC1MDl7aKHPwrWOVO1toxNyps X2IWQ9b4BaWfykJugZxRGG12yPiOE+shQQzjECh8R1T86KSAQiw7qvPkS4+ITaYdcEnB rpaj/1EdaBEGug3kdmsQPFgFqLeMUhr6WerUjCvrqisXWaiLayiFXAni1Z59DCJ0qUYY UgJWJ9eeywmoFS88tFWejGkBG+/FuqQKaVYOjXrDN9uJ0jt0QLIB553r5/ty1/9733BS oItETKuX5nSzD/F9rCb3Kd407wlD4lihkgJDzzFxapdNko/CNYIIQttgWUSpD8RMCs2B UQ== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tnmds91pf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 11 Oct 2023 12:55:11 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39BCtBVC009419 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 11 Oct 2023 12:55:11 GMT Received: from akronite-sh-dev02.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Wed, 11 Oct 2023 05:55:07 -0700 From: Luo Jie To: , , , , , , , , , , CC: , , , , Subject: [PATCH v10 1/4] clk: qcom: branch: Add clk_branch2_prepare_ops Date: Wed, 11 Oct 2023 20:54:44 +0800 Message-ID: <20231011125447.26530-2-quic_luoj@quicinc.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231011125447.26530-1-quic_luoj@quicinc.com> References: <20231011125447.26530-1-quic_luoj@quicinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: DBEIz4jYb-gL9XXRaIJ9c2CGHzhglg-Y X-Proofpoint-GUID: DBEIz4jYb-gL9XXRaIJ9c2CGHzhglg-Y X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-11_09,2023-10-11_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 suspectscore=0 clxscore=1015 spamscore=0 phishscore=0 impostorscore=0 mlxlogscore=791 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2310110114 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Add the clk_branch2_prepare_ops for supporting clock controller where the hardware register is accessed by MDIO bus, and the spin lock can't be used because of sleep during the MDIO operation. The clock is enabled by the .prepare instead of .enable when the clk_branch2_prepare_ops is used. Signed-off-by: Luo Jie Acked-by: Stephen Boyd --- drivers/clk/qcom/clk-branch.c | 7 +++++++ drivers/clk/qcom/clk-branch.h | 1 + 2 files changed, 8 insertions(+) diff --git a/drivers/clk/qcom/clk-branch.c b/drivers/clk/qcom/clk-branch.c index fc4735f74f0f..e22cdcf694f6 100644 --- a/drivers/clk/qcom/clk-branch.c +++ b/drivers/clk/qcom/clk-branch.c @@ -153,3 +153,10 @@ const struct clk_ops clk_branch_simple_ops = { .is_enabled = clk_is_enabled_regmap, }; EXPORT_SYMBOL_GPL(clk_branch_simple_ops); + +const struct clk_ops clk_branch2_prepare_ops = { + .prepare = clk_branch2_enable, + .unprepare = clk_branch2_disable, + .is_prepared = clk_is_enabled_regmap, +}; +EXPORT_SYMBOL_GPL(clk_branch2_prepare_ops); diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h index 0cf800b9d08d..f6f355f28b71 100644 --- a/drivers/clk/qcom/clk-branch.h +++ b/drivers/clk/qcom/clk-branch.h @@ -85,6 +85,7 @@ extern const struct clk_ops clk_branch_ops; extern const struct clk_ops clk_branch2_ops; extern const struct clk_ops clk_branch_simple_ops; extern const struct clk_ops clk_branch2_aon_ops; +extern const struct clk_ops clk_branch2_prepare_ops; #define to_clk_branch(_hw) \ container_of(to_clk_regmap(_hw), struct clk_branch, clkr)