From patchwork Sat Dec 2 15:33:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jisheng Zhang X-Patchwork-Id: 750202 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2F8D1173B for ; Sat, 2 Dec 2023 15:46:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TLiU/mcf" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7352BC433C9; Sat, 2 Dec 2023 15:46:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1701531983; bh=Oh3T5Mw/d1ShgN3QuPdpYAcWUqUHtc0/ANZQUJzPc18=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TLiU/mcfZNFrp0cP5llA155Zvk4sGKsx4jDJAFeHEEaiprDRkEiqqQgDehbKsAI38 ftZQMuo6bU/DAV+KjIz0iZaGFodSttkM7+1KWrfOTGdyC91RoT9ek3VTbz5jFO2fK+ NC0Py2cFHr3GI6f+hhBgk5Gzo0jxjq/oUaRUsZ70b29OeixT4bLjgG9g6rRZTNoSx/ UJmGSeFcVnuFjqvQaetwH3+e018QBBUaaehn/vNQlAFZIvm2q9r8ip6cjxHmosMhif zqjOyZAHxVQhqVUV30oJOUzWO2Zvc9MIpdjNY+BVovIzvMX4jBcqhqGH0Bl5sv06Cl qRJ7JE9i4Hn/g== From: Jisheng Zhang To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Emil Renner Berthing , Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 1/3] riscv: dts: starfive: add 'cpus' label to jh7110 and jh7100 soc dtsi Date: Sat, 2 Dec 2023 23:33:51 +0800 Message-Id: <20231202153353.635-2-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20231202153353.635-1-jszhang@kernel.org> References: <20231202153353.635-1-jszhang@kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the 'cpus' label so that we can reference it in board dts files. Signed-off-by: Jisheng Zhang --- arch/riscv/boot/dts/starfive/jh7100.dtsi | 2 +- arch/riscv/boot/dts/starfive/jh7110.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index e68cafe7545f..e6959f2d4f1e 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -13,7 +13,7 @@ / { #address-cells = <2>; #size-cells = <2>; - cpus { + cpus: cpus { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 45213cdf50dc..5a6ff90685e5 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -15,7 +15,7 @@ / { #address-cells = <2>; #size-cells = <2>; - cpus { + cpus: cpus { #address-cells = <1>; #size-cells = <0>;