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[209.91.167.254]) by smtp.gmail.com with ESMTPSA id d10-20020a0cfe8a000000b0067f454b5307sm4419061qvs.108.2024.01.16.12.41.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Jan 2024 12:41:20 -0800 (PST) From: Trevor Woerner To: linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Chen-Yu Tsai Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH 2/2] arm64: dts: rockchip: rock-pi-e: fix location of snps properties Date: Tue, 16 Jan 2024 15:41:02 -0500 Message-ID: <20240116204103.29318-2-twoerner@gmail.com> X-Mailer: git-send-email 2.43.0.76.g1a87c842ece3 In-Reply-To: <20240116204103.29318-1-twoerner@gmail.com> References: <20240116204103.29318-1-twoerner@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 A number of snps (Synopsys) properties are not in their correct location. Fixes: b918e81f2145 ("arm64: dts: rockchip: rk3328: Add Radxa ROCK Pi E") Signed-off-by: Trevor Woerner --- arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts index 096cfa19036e..0739b8fec86e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts +++ b/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts @@ -150,8 +150,11 @@ &gmac2io { phy-mode = "rgmii"; phy-supply = <&vcc_io>; pinctrl-names = "default"; - pinctrl-0 = <&rgmiim1_pins>; + pinctrl-0 = <&rgmiim1_pins>, <ð_phy_reset_pin>; snps,aal; + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; snps,rxpbl = <0x4>; snps,txpbl = <0x4>; tx_delay = <0x26>; @@ -165,13 +168,10 @@ mdio { rtl8211: ethernet-phy@1 { reg = <1>; - pinctrl-0 = <ð_phy_int_pin>, <ð_phy_reset_pin>; + pinctrl-0 = <ð_phy_int_pin>; pinctrl-names = "default"; interrupt-parent = <&gpio1>; interrupts = <24 IRQ_TYPE_LEVEL_LOW>; - reset-assert-us = <10000>; - reset-deassert-us = <50000>; - reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; }; }; };