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Wed, 17 Jan 2024 12:25:57 -0800 From: Petlozu Pravareshwar To: , , , , , , , , , , , , , CC: Subject: [PATCH V2 3/3] soc/tegra: pmc: Update scratch as an optional aperture Date: Wed, 17 Jan 2024 20:25:04 +0000 Message-ID: <20240117202504.943476-3-petlozup@nvidia.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240117202504.943476-1-petlozup@nvidia.com> References: <20240117202504.943476-1-petlozup@nvidia.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NVConfidentiality: public X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF0001A0FB:EE_|SN7PR12MB6766:EE_ X-MS-Office365-Filtering-Correlation-Id: 9c87052d-7dc8-44b9-4f44-08dc179a898a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: FTdVH/CjXtosKIB5Vr8+zR/kk6NYAOwqNZLqSLFxnqndMO0AG8PoXs0SN+HmOEaARA1f04aaEH1ey94Jzcka8l9O6d582HLVwbB/seN+sRLZO0kEJKDItGhInlK2UsJoVgl04IHVKEUwINh9/Qs3iJ+oMN3Vb6kTWZR9bMP3txkltCrLbnbA17rCOrjauaI5DBgAjnp6QzQHm2aImQyeMUTAjXS3L28ckGfSuSqwdNwSRXkdBxKt7ZnNjfQEwbqMM19C+F/mLD8eStw5EwzOw0Kh7XqmUizQ7Apoq5X1yWnEHk7Gyw21zJjZbS0NFYrrCAh2IZQjSrfVeYkqVJ00fjnns0wfWjS15ledDlg4CqIFmo5wlm12Z3GHq7sInRj9FuArwvGrAwRKbnRAgRYOhUtdekO4kF5GKlg0RbMzjFXZU8BOAe4DxUjWzrG6Zz84lmPjb57BQNCcNq+XdqIpJQzZFkC9GqJnHD5pXOenhZwZiPqtLZQfN6hY4h8UeHUqzo9D3ItRByH5K29dYh6GmEFYA545bVPyivG6SQzNPM10X9wTelW1RC0+pDpKrTMPqPkblvpxeIQViAUiHjbG7+zr7w9f4vPMILctb2iuPUmCr50IPnk4BDBpfoQIlMtQQHBi3rYbkDXDxAKBZZ+USMOEuz2xPi/N6eDBVCToCxyV/Kk4811S0uSh2w+7fYIbZGzg+ZYRX9+LlCud0xeZqtU3DiY50R0PkYEiw7r3+cuVpvVjoZ10TuHmjqO6o7a+ X-Forefront-Antispam-Report: CIP:216.228.118.233; CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc7edge2.nvidia.com; CAT:NONE; SFS:(13230031)(4636009)(376002)(346002)(396003)(136003)(39860400002)(230922051799003)(451199024)(1800799012)(82310400011)(64100799003)(186009)(46966006)(36840700001)(40470700004)(921011)(5660300002)(7416002)(2906002)(41300700001)(82740400003)(1076003)(26005)(2616005)(40460700003)(83380400001)(40480700001)(336012)(426003)(6666004)(36860700001)(478600001)(47076005)(107886003)(4326008)(8676002)(86362001)(8936002)(70206006)(70586007)(7636003)(316002)(36756003)(110136005)(356005); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jan 2024 20:26:07.7525 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9c87052d-7dc8-44b9-4f44-08dc179a898a X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A0FB.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6766 Scratch address space register is used to store reboot reason. For some Tegra234 systems, the scratch space is not available to store the reboot reason. This is because scratch region on these systems is not accessible by the kernel as restricted by the Hypervisor. Such systems would delist scratch aperture from PMC DT node. Hence this change makes scratch as optional aperture and also avoids registering reboot notifier if scratch address space isn't mapped. Signed-off-by: Petlozu Pravareshwar --- drivers/soc/tegra/pmc.c | 26 +++++++++++++++++--------- 1 file changed, 17 insertions(+), 9 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index 0bc983f6b088..6948f78c7a4a 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -2903,11 +2903,16 @@ static int tegra_pmc_probe(struct platform_device *pdev) if (IS_ERR(pmc->aotag)) return PTR_ERR(pmc->aotag); + /* "scratch" is an optional aperture */ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "scratch"); - pmc->scratch = devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(pmc->scratch)) - return PTR_ERR(pmc->scratch); + if (res) { + pmc->scratch = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(pmc->scratch)) + return PTR_ERR(pmc->scratch); + } else { + pmc->scratch = NULL; + } } pmc->clk = devm_clk_get_optional(&pdev->dev, "pclk"); @@ -2919,12 +2924,15 @@ static int tegra_pmc_probe(struct platform_device *pdev) * PMC should be last resort for restarting since it soft-resets * CPU without resetting everything else. */ - err = devm_register_reboot_notifier(&pdev->dev, - &tegra_pmc_reboot_notifier); - if (err) { - dev_err(&pdev->dev, "unable to register reboot notifier, %d\n", - err); - return err; + if (pmc->scratch) { + err = devm_register_reboot_notifier(&pdev->dev, + &tegra_pmc_reboot_notifier); + if (err) { + dev_err(&pdev->dev, + "unable to register reboot notifier, %d\n", + err); + return err; + } } err = devm_register_sys_off_handler(&pdev->dev,