From patchwork Fri Jan 26 23:53:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oreoluwa Babatunde X-Patchwork-Id: 766587 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 619B158232; Fri, 26 Jan 2024 23:55:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706313358; cv=none; b=ImfR5pwLdx0hvosD+8UCma5VObpC1A6Q8/sSxvKIxjCrXgCgmNLzEqXP2PRZ2F0ed6Qb6ThcznvdKJrSWOwiVy0yYlAE6t+9xMiRihkGuQXdviE5MhFHbzlTbJllzCi1+/AH5IwQO9Dkse3b6r4D93JUZ7d4FQbjnWCywarQWSM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1706313358; c=relaxed/simple; bh=9oAjT6eGilm06NGiGDpM3OUuJSSSbHjIaZGn12tBeUU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Ssn1JS5SJeGtxS+Z7yRFHGCxYMKS19xki+arRzLaAH0K9EyVRRUIXfCdyzRfmwAmoAABJwN2ePQUVJ8U33WvpDKBcYsDrE+DeHRMrtReAhFFZFAMbJaHf0SkJRgXTRBiTyUlsmvyQ31Mzi/cvDKPwMesQy9dYkzKkuABZKkzOUM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com; spf=pass smtp.mailfrom=quicinc.com; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b=mA62snqA; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="mA62snqA" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40QNf8t3022118; Fri, 26 Jan 2024 23:55:06 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-type; s=qcppdkim1; bh=V0LEvpWcWygNAyG9WGDn fp0Gm0ltd++h0qHGAExwYhc=; b=mA62snqAlGQC4QpudaSR/kUKojXSWQE+SjeV v/zl6ClTFt5gpmgAmlx10hYXzfwku/HiLM/KFAaXkPQmYj3wvaS69ymSRHCh8qG2 wcgBcM9aUzsBJX++bE2Y+YgpgSZAwuNVamVT7NR9Ub0qCB7bJ/E/kG57nM6+Zd3h X64H21/nSJB/OSchBCRCHnF0OXcx2Uas1TkL5+wN6msaba+N9z4nSdZfSB7jAowX 3CdFsoehkAY2jODahUgQdEzj6956J0w/bZKPubSwWTKDMR/o8zUqFEGMEXxiTEJJ lHgaHt2lm7bMMLCDIA5UfAFnEh84Zq5kVt1UgfrM3GfQWxFKyQ== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3vv4nrad0r-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 Jan 2024 23:55:05 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 40QNt43T011314 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 26 Jan 2024 23:55:04 GMT Received: from hu-obabatun-lv.qualcomm.com (10.49.16.6) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 26 Jan 2024 15:55:00 -0800 From: Oreoluwa Babatunde To: , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , , , , Oreoluwa Babatunde Subject: [PATCH 09/46] mips: reserved_mem: Implement the new processing order for reserved memory Date: Fri, 26 Jan 2024 15:53:48 -0800 Message-ID: <20240126235425.12233-10-quic_obabatun@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20240126235425.12233-1-quic_obabatun@quicinc.com> References: <20240126235425.12233-1-quic_obabatun@quicinc.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: S6wU07rNBCx7nZxx8XMNpsvpLyLtyokP X-Proofpoint-GUID: S6wU07rNBCx7nZxx8XMNpsvpLyLtyokP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-01-25_14,2024-01-25_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 adultscore=0 mlxlogscore=613 spamscore=0 mlxscore=0 bulkscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2401190000 definitions=main-2401260176 Call early_fdt_scan_reserved_mem() in place of early_init_fdt_scan_reserved_mem() to carry out the first stage of the reserved memory processing only. The early_fdt_scan_reserved_mem() function is used to scan through the DT and mark all the reserved memory regions as reserved or nomap as needed, as well as allocate the memory required by the dynamically-placed reserved memory regions. The second stage of the reserved memory processing is done by fdt_init_reserved_mem(). This function is used to store the information of the statically-placed reserved memory nodes in the reserved_mem array as well as call the region specific initialization function on all the stored reserved memory regions. The call to fdt_init_reserved_mem() is placed right after early_fdt_scan_reserved_mem() because memblock allocated memory should be writable at this point. Signed-off-by: Oreoluwa Babatunde --- arch/mips/kernel/setup.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 9c30de151597..13e862151d5f 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -649,7 +650,8 @@ static void __init arch_mem_init(char **cmdline_p) check_kernel_sections_mem(); early_init_fdt_reserve_self(); - early_init_fdt_scan_reserved_mem(); + early_fdt_scan_reserved_mem(); + fdt_init_reserved_mem(); #ifndef CONFIG_NUMA memblock_set_node(0, PHYS_ADDR_MAX, &memblock.memory, 0);