From patchwork Thu Aug 16 12:54:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "\(Exiting\) Baolin Wang" X-Patchwork-Id: 144392 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2043094ljj; Thu, 16 Aug 2018 05:55:34 -0700 (PDT) X-Google-Smtp-Source: AA+uWPyz3NZPmAt8Eg96/h3mvIoqErp00iW9+jqmNz+IN0KGcrDRS/x5iXc/GwEnRIefsSGoA1m0 X-Received: by 2002:a62:cf82:: with SMTP id b124-v6mr32306042pfg.142.1534424134847; Thu, 16 Aug 2018 05:55:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1534424134; cv=none; d=google.com; s=arc-20160816; b=Cz9WydJvAn/0p62T+9TpDUorgb4o+4rGO87zol/8gy4AzvMmmYwFAckLQlH35iC+/7 uNck++ZtT/FP1Fa2BhjhE5uyJ312+Dw15d05RPyAajo/wE9YY2vdSnw6xLnDtx6XDfDh fmf5Cpg7hHi/sjmwPS1aWxm9dheBPsahTHtAxVk5ormrnVyK68+JGgC4FuEEiQQJduj3 zae2I7XyLruemcn0kUlAt9htPXTbitErwTObnhvRYKhCdkDupc4gj2W86s+aOiZt6QBP kJS87NlUM7x6XM06JBnSDS2fr3NlBtHDDAc/l/c/7JJ7XKf78aQWHdRrrBnFh2av1r25 jeAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=Q+AUOMeB2Ab47XkW5MPLyXFqW7/NNAsWImFo6vB5OtQ=; b=eexpnu8H/FTj4cNcgksWqboLxFktO8uHCAWnWL8vKFftmaFX48vYPVHoZuUtdT1tQN 7PKOot8BdPsoM1VPEim0pLtacoXHkhAADMPnSAcc8i3nFugfl9491LCb9UdJBp+fxFTw UUhFhlL+UDYL2fNPBNHKDf/681wxPNHMUfVSA2XND9ceOywyP2cpGqYgYtFBnYroXWmL G2Nd9DptCABLCc5QSlj3d6VK3bkubtWw+ScP9VLdCeBxvnARqF5z3vys4Ri1JK0KCIZ4 jTqNy6l3esJvC8wpksA1U8+Yo3XrB5+re7cYu5XTP+IzID0K35UlR17XQ2Ru3aY50wNu 5fFg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=URnqjOZu; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i64-v6si29817688pfb.314.2018.08.16.05.55.34; Thu, 16 Aug 2018 05:55:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=URnqjOZu; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391491AbeHPPx5 (ORCPT + 5 others); Thu, 16 Aug 2018 11:53:57 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:46160 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391478AbeHPPx5 (ORCPT ); Thu, 16 Aug 2018 11:53:57 -0400 Received: by mail-pg1-f194.google.com with SMTP id f14-v6so2020704pgv.13 for ; Thu, 16 Aug 2018 05:55:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=Q+AUOMeB2Ab47XkW5MPLyXFqW7/NNAsWImFo6vB5OtQ=; b=URnqjOZuTORwigtzkX6s24VzknHrs8yQxQ5TfLTc+uITW4cEWB3jI1TkqWlOLbBq4U Sx91giRa9ZEudT8BVAWDBLI04S4rgZZFVvp+nQjcOz8I+NUMnjlPpfrwq2DhShDQoA8C 6byd+8Chnpm1tPZ6E734EzvTPdwR1XpSnugMM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=Q+AUOMeB2Ab47XkW5MPLyXFqW7/NNAsWImFo6vB5OtQ=; b=rLhf4yUiNtt+7seLH6MwZ8ghLAg3upLxLB+EKOS1GXyJLUE00Ux7QLUIYi4W5bVcAu JoHVJLpc3wiwM+Mr3vrtiycDHL4q3si37jEe+BvjBYxa38LaOrgyiHldjOMitp3Ia4xn hBQ2Fa+Q897khAVyuRHuwPbnDye7/JHY2V9BSyiVCBcaY+j55aTevqpjpGZXnm6iIu1Q S/3jX5dMuAxdz0hccGYmy9JCTIQO3u2PZqSv24ROw3gv/DHCPJEj2GjhXejkReVGyGF3 MVYzYRH+ZX6awz9exj1qtgIeisRoHeJuALcFfsCRaEw1xMqw9mxK0xnOVcUqM21GoVTE 0R7A== X-Gm-Message-State: AOUpUlFZ+qXt7UQwQgrq8rwjs4AMXmvchspeojTklsNdzMe2qGhs6j/j 1KLXZ/fKXl6ZjROhrikAdMEIvg== X-Received: by 2002:a62:ca0d:: with SMTP id n13-v6mr31983354pfg.69.1534424132161; Thu, 16 Aug 2018 05:55:32 -0700 (PDT) Received: from baolinwangubtpc.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id 203-v6sm34944589pgb.14.2018.08.16.05.55.29 (version=TLS1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 16 Aug 2018 05:55:31 -0700 (PDT) From: Baolin Wang To: broonie@kernel.org, robh+dt@kernel.org, mark.rutland@arm.com Cc: orsonzhai@gmail.com, zhang.lyra@gmail.com, lanqing.liu@spreadtrum.com, baolin.wang@linaro.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/3] dt-bindings: spi: Add Spreadtrum SPI controller documentation Date: Thu, 16 Aug 2018 20:54:50 +0800 Message-Id: <53e9467b4b16911576bcfb71c50c108ea83a803c.1534423916.git.baolin.wang@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Lanqing Liu This patch adds the binding documentation for Spreadtrum SPI controller device. Signed-off-by: Lanqing Liu Signed-off-by: Baolin Wang --- Changes from v1: - Remove the sprd,spi-interval property. --- Documentation/devicetree/bindings/spi/spi-sprd.txt | 26 ++++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-sprd.txt -- 1.7.9.5 diff --git a/Documentation/devicetree/bindings/spi/spi-sprd.txt b/Documentation/devicetree/bindings/spi/spi-sprd.txt new file mode 100644 index 0000000..bad211a --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-sprd.txt @@ -0,0 +1,26 @@ +Spreadtrum SPI Controller + +Required properties: +- compatible: Should be "sprd,sc9860-spi". +- reg: Offset and length of SPI controller register space. +- interrupts: Should contain SPI interrupt. +- clock-names: Should contain following entries: + "spi" for SPI clock, + "source" for SPI source (parent) clock, + "enable" for SPI module enable clock. +- clocks: List of clock input name strings sorted in the same order + as the clock-names property. +- #address-cells: The number of cells required to define a chip select + address on the SPI bus. Should be set to 1. +- #size-cells: Should be set to 0. + +Example: +spi0: spi@70a00000{ + compatible = "sprd,sc9860-spi"; + reg = <0 0x70a00000 0 0x1000>; + interrupts = ; + clock-names = "spi", "source","enable"; + clocks = <&clk_spi0>, <&ext_26m>, <&clk_ap_apb_gates 5>; + #address-cells = <1>; + #size-cells = <0>; +};