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[209.132.180.67]) by mx.google.com with ESMTP id w18si17143923pgf.439.2019.02.28.04.28.19; Thu, 28 Feb 2019 04:28:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=U4rNZOWP; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731718AbfB1M2S (ORCPT + 7 others); Thu, 28 Feb 2019 07:28:18 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:50332 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731126AbfB1M2S (ORCPT ); Thu, 28 Feb 2019 07:28:18 -0500 Received: by mail-wm1-f68.google.com with SMTP id x7so9004824wmj.0 for ; Thu, 28 Feb 2019 04:28:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=C9KTcipBBMH7iKIKkQeECQsP2OoeAr07E1QgLTBcEng=; b=U4rNZOWPYk3JdSh5EfKt+17n3fALS6FunIpr9HvS0GEuvgK28pPMANAdGYJWJWGOKy Q0b8lh9LFQrjIfGUNvrzsu/gaoJOanYgVGFJGNIUINuX1faSy3a4p2htrMnHxNxmtONK efQEjt6GRZWJLTqSRHHs528gzI/0m9aQDhdPT+jDKoNW7ST+yc0oGYrYfLdFlHOiR/xK vMqoyJJxIT44R+gBVmyI/fNo8Vx3DTjdUns3q/8VohR6MpG672FCGT0leSYMGIgVuc8k nWVLuCJoNDCoW7e5+3Ed8LSfTM5JTxzJme87HELZZ5BAOa8YNnZlXbWb10zcrfpLT+O1 rllA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=C9KTcipBBMH7iKIKkQeECQsP2OoeAr07E1QgLTBcEng=; b=aFwKKe/ub7j7NHAC2+J0SnAT6uAes28Dq5Xjw+VkMIrY7crlXIrOSgsm1/gFztpytC X8HrIDNfeDet6MXPFvLuSwGFmRFpn9hnHCheAVO5GQ8aF3swxfVUZ91/xbdr37E7J27a Ut47rQG++Ajw9DJU00Y9qP7maZ0WW3EsEs5BRw50Rob1DId7+KgnerjUsrSgnAObucal SrLQx671ysc0JmpHppMIONXg3BJVO3xT5ietO8YDzPaPoSx4HeR4uVXqAHBdcEFttaLE amrrrDzTY6L0DyU2LPJh2dT0J3BJH9NuvRjzlAI2q/dZqzGJVNbpE8sinxj0E+mgQKPX KJtA== X-Gm-Message-State: APjAAAXm8veUrfSgx7MLtKrCYJX6+EF+LeAM9DR0HiNpZoVrLT95DC7a UrgxgOF/R62mkxCa6ByToxkVSQ== X-Received: by 2002:a1c:7d8c:: with SMTP id y134mr2914817wmc.102.1551356896073; Thu, 28 Feb 2019 04:28:16 -0800 (PST) Received: from localhost ([49.248.54.130]) by smtp.gmail.com with ESMTPSA id i16sm15119244wru.16.2019.02.28.04.28.14 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 28 Feb 2019 04:28:15 -0800 (PST) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, andy.gross@linaro.org, Daniel Lezcano , David Brown , Zhang Rui Cc: devicetree@vger.kernel.org Subject: [PATCH v2 23/24] arm64: dts: qcom: qcs404: Add thermal zones for each sensor Date: Thu, 28 Feb 2019 17:51:13 +0530 Message-Id: <63c4711ea258c557158ef9dd551a1b4eae4038da.1551355503.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org qcs404 has 10 sensors connected to the single TSENS IP. Define a thermal zone for each of those sensors to expose the temperature of each zone. Signed-off-by: Amit Kucheria --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 252 +++++++++++++++++++++++++++ 1 file changed, 252 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 57d14d8f0c90..8b3ac5f7f2a3 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -3,6 +3,7 @@ #include #include +#include / { interrupt-parent = <&intc>; @@ -30,6 +31,7 @@ reg = <0x100>; enable-method = "psci"; next-level-cache = <&L2_0>; + #cooling-cells= <2>; }; CPU1: cpu@101 { @@ -38,6 +40,7 @@ reg = <0x101>; enable-method = "psci"; next-level-cache = <&L2_0>; + #cooling-cells= <2>; }; CPU2: cpu@102 { @@ -46,6 +49,7 @@ reg = <0x102>; enable-method = "psci"; next-level-cache = <&L2_0>; + #cooling-cells= <2>; }; CPU3: cpu@103 { @@ -54,6 +58,7 @@ reg = <0x103>; enable-method = "psci"; next-level-cache = <&L2_0>; + #cooling-cells= <2>; }; L2_0: l2-cache { @@ -507,4 +512,251 @@ #interrupt-cells = <2>; }; }; + + thermal-zones { + aoss-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 0>; + + trips { + aoss_alert0: trip-point@0 { + temperature = <95000>; + hysteresis = <2000>; + type = "hot"; + }; + aoss_crit: aoss_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + q6-hvx-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 1>; + + trips { + dsp_alert0: trip-point@0 { + temperature = <95000>; + hysteresis = <2000>; + type = "hot"; + }; + dsp_crit: dsp_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + lpass-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 2>; + + trips { + lpass_alert0: trip-point@0 { + temperature = <95000>; + hysteresis = <2000>; + type = "hot"; + }; + lpass_crit: lpass_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + wlan-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 3>; + + trips { + wlan_alert0: trip-point@0 { + temperature = <95000>; + hysteresis = <2000>; + type = "hot"; + }; + wlan_crit: wlan_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + cluster-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 4>; + + trips { + cluster_alert0: trip-point@0 { + temperature = <95000>; + hysteresis = <2000>; + type = "passive"; + }; + cluster_crit: cluster_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cluster_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu0-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 5>; + + trips { + cpu0_alert0: trip-point@0 { + temperature = <95000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu0_crit: cpu_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu0_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu1-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 6>; + + trips { + cpu1_alert0: trip-point@0 { + temperature = <95000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu1_crit: cpu_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu1_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu2-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 7>; + + trips { + cpu2_alert0: trip-point@0 { + temperature = <95000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu2_crit: cpu_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu2_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu3-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 8>; + + trips { + cpu3_alert0: trip-point@0 { + temperature = <95000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu3_crit: cpu_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&cpu3_alert0>; + cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + gpu-thermal { + polling-delay-passive = <250>; + polling-delay = <1000>; + + thermal-sensors = <&tsens 9>; + + trips { + gpu_alert0: trip-point@0 { + temperature = <95000>; + hysteresis = <2000>; + type = "hot"; + }; + gpu_crit: gpu_crit { + temperature = <110000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; };