From patchwork Thu Jun 18 06:03:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengjiu Wang X-Patchwork-Id: 191083 Delivered-To: patch@linaro.org Received: by 2002:a92:cf06:0:0:0:0:0 with SMTP id c6csp1119629ilo; Wed, 17 Jun 2020 23:15:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyP0qbmKCN6Yi3z1NnmfWY8J9V1UnHXHs0t3Y49kD8nxHOUYiLJh+6/hDCLi/Vr7SMJilKB X-Received: by 2002:a17:906:51d1:: with SMTP id v17mr2426999ejk.383.1592460924135; Wed, 17 Jun 2020 23:15:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1592460924; cv=none; d=google.com; s=arc-20160816; b=lTlZANbe7hvPsds5kwF3ogZFzaJSFiOfjVPHDzTJBbZEr5QqmC6rxIhfD2GhHNeao2 fW7hAZEIx26Js1Nm59gs/6hZ/fEKc2TSsF548LpItdLM37gjam52obpKEHOrdirPPMLT llCPMZONXk6I0WyT+10l+fb8GmKTVBFX5FLmInifukHHkgSveJcRUIj6ygLu/gq4NQAw pvMj4M7BHKeTY0B2Y6sSDtLpb7X8Rg7ChFDFYybX/FMJTl/H0WbpjmzgVC6WdZaJoDwL bCSh7dOuXbObFK14zH65d4BkRDQ+P26GPOuKqMfnmDixSqLZA59/D89X346UeExE/DCm ED8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:to:from; bh=dXifP0uA6d6JdOw/XTNtMliSyHXEGGJQ3Pey87nIDTg=; b=ejq9LsZ6+DWxjZVg+Cwb0w1VsqPWdpQ3Ww6etznZwuYZxFpGEVExHBjbQbhXMhYZCJ vft2RZTZPu5t+6veU3tApgQfBGqo+Ngw8TAEiLSrphDSTQuyGqiILbOHJ+oMwnbBE2xi Im3JWUutxweaIGh5VUF+MTb+wmigGA4N1ApQbfeMf2NOQcx/sm3YT1QmlHv//j9lcaQA 7lAhGp9dtel77RumsOKy3r5Pa9Hqk4RqW2wjrME66hjdMlhyuSYlq1WDSmCE1QpN1ZaX cJZ7HrjRBJ/PaPsPGK9dln9V8+vsgCoB+/oavoo69TE7KD6j7nGZPqOFt9L3d67V8zl/ pAAQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id s12si1179161eju.110.2020.06.17.23.15.23; Wed, 17 Jun 2020 23:15:24 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727849AbgFRGPG (ORCPT + 6 others); Thu, 18 Jun 2020 02:15:06 -0400 Received: from inva020.nxp.com ([92.121.34.13]:47118 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726950AbgFRGPE (ORCPT ); Thu, 18 Jun 2020 02:15:04 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id B50A71A0E59; Thu, 18 Jun 2020 08:15:01 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E402D1A0E46; Thu, 18 Jun 2020 08:14:57 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id E320D4030E; Thu, 18 Jun 2020 14:14:52 +0800 (SGT) From: Shengjiu Wang To: robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/5] ARM: dts: imx6sx-sdb: Add MQS support Date: Thu, 18 Jun 2020 14:03:46 +0800 Message-Id: X-Mailer: git-send-email 2.7.4 In-Reply-To: References: In-Reply-To: References: X-Virus-Scanned: ClamAV using ClamSMTP Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add MQS support. As the pin conflict with usdhc2, then need to add a separate dts. Signed-off-by: Shengjiu Wang --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/imx6sx-sdb-mqs.dts | 48 ++++++++++++++++++++++++++++ arch/arm/boot/dts/imx6sx-sdb.dtsi | 7 ++++ arch/arm/boot/dts/imx6sx.dtsi | 6 ++++ 4 files changed, 62 insertions(+) create mode 100644 arch/arm/boot/dts/imx6sx-sdb-mqs.dts -- 2.21.0 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index e6a1cac0bfc7..04f85d6a2af3 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -592,6 +592,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \ imx6sx-sdb-reva.dtb \ imx6sx-sdb-sai.dtb \ imx6sx-sdb.dtb \ + imx6sx-sdb-mqs.dtb \ imx6sx-softing-vining-2000.dtb \ imx6sx-udoo-neo-basic.dtb \ imx6sx-udoo-neo-extended.dtb \ diff --git a/arch/arm/boot/dts/imx6sx-sdb-mqs.dts b/arch/arm/boot/dts/imx6sx-sdb-mqs.dts new file mode 100644 index 000000000000..a4ab2d3e960c --- /dev/null +++ b/arch/arm/boot/dts/imx6sx-sdb-mqs.dts @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Copyright (C) 2014 Freescale Semiconductor, Inc. + +#include "imx6sx-sdb.dts" +/ { + + sound { + status = "disabled"; + }; + + sound-mqs { + compatible = "fsl,imx6sx-sdb-mqs", + "fsl,imx-audio-mqs"; + model = "mqs-audio"; + audio-cpu = <&sai1>; + audio-asrc = <&asrc>; + audio-codec = <&mqs>; + }; +}; + +&usdhc2 { + /* pin conflict with mqs*/ + status = "disabled"; +}; + +&mqs { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mqs>; + clocks = <&clks IMX6SX_CLK_SAI1>; + clock-names = "mclk"; + status = "okay"; +}; + +&sai1 { + pinctrl-0 = <>; + status = "okay"; +}; + +&ssi2 { + status = "disabled"; +}; + +&sdma { + gpr = <&gpr>; + /* SDMA event remap for SAI1 */ + fsl,sdma-event-remap = <0 15 1>, <0 16 1>; +}; diff --git a/arch/arm/boot/dts/imx6sx-sdb.dtsi b/arch/arm/boot/dts/imx6sx-sdb.dtsi index 3e5fb72f21fc..69a502b369c5 100644 --- a/arch/arm/boot/dts/imx6sx-sdb.dtsi +++ b/arch/arm/boot/dts/imx6sx-sdb.dtsi @@ -450,6 +450,13 @@ >; }; + pinctrl_mqs: mqsgrp { + fsl,pins = < + MX6SX_PAD_SD2_CLK__MQS_RIGHT 0x120b0 + MX6SX_PAD_SD2_CMD__MQS_LEFT 0x120b0 + >; + }; + pinctrl_i2c1: i2c1grp { fsl,pins = < MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1 diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 7d4856ffd239..8dc412b3862b 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -134,6 +134,12 @@ clock-output-names = "anaclk2"; }; + mqs: mqs { + compatible = "fsl,imx6sx-mqs"; + gpr = <&gpr>; + status = "disabled"; + }; + tempmon: tempmon { compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon"; interrupt-parent = <&gpc>;