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[209.132.180.67]) by mx.google.com with ESMTP id t19-v6si22708780plo.287.2018.05.25.03.32.41; Fri, 25 May 2018 03:32:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=ZHVKV597; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966151AbeEYKcj (ORCPT + 5 others); Fri, 25 May 2018 06:32:39 -0400 Received: from mail-pf0-f196.google.com ([209.85.192.196]:33237 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966081AbeEYKcg (ORCPT ); Fri, 25 May 2018 06:32:36 -0400 Received: by mail-pf0-f196.google.com with SMTP id a20-v6so2400345pfo.0 for ; Fri, 25 May 2018 03:32:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=XE6OgpSTNlTBCGjLGkhYWb3esagTBf6X4g5axr00Eqk=; b=ZHVKV597OW/4IhWJQB3len6m2aeCNxnbesy2DEwZ+KtLJ/88iqPk8EaNL/E8146ecg MnneXZx7hCi1CBal6ash+0Aj/1hB1TPpIp/BiTrfR0MvUcSk+poytaknzqk28I8qVa9i GUzDxWc9kDrKQGJtsJtTjTdFRE1S4aMnS3MME= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=XE6OgpSTNlTBCGjLGkhYWb3esagTBf6X4g5axr00Eqk=; b=irm4OXMw9Z2ziNEzep19c8mj3mr1Hg+03O9vNtK0rOyKOG/jdQT58c6gDaYVz11OBe bGAy7rYguj8lPe0Y1qrY008khgYH7jx+/ZVoTBxkbaPUU8tO5z9si9dkwLBWXOKQtHrB yPvZoajK/9q7qymcUlMPt676V1VCphJi3oIV4Gs7aYpXEIZjw7C/4y6Bly8JnKH+C4n6 uBXl14o8RdS7gHDfYSeTbQusJQydhuFQfpeZw03ZT9MzfzJ81kZdEzfPDd9xgIL8hEFk t5gfNmPZtj//0iLnkLlog4JaYBcTNdEwV4SiOo3IuSdAJaez97k5pbrK8wSwQa/z4SuH 2o2g== X-Gm-Message-State: ALKqPwdX/chsD3HsA8nYrMF+3sq52E44oMftNsXWVRAcJOR2nJW27LtC iLxmAsDJ0qy7GFGrTT+qrbkphg== X-Received: by 2002:a65:61a5:: with SMTP id i5-v6mr1464334pgv.405.1527244356343; Fri, 25 May 2018 03:32:36 -0700 (PDT) Received: from localhost ([122.172.112.176]) by smtp.gmail.com with ESMTPSA id c3-v6sm43882352pfn.62.2018.05.25.03.32.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 25 May 2018 03:32:35 -0700 (PDT) From: Viresh Kumar To: arm@kernel.org, Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai Cc: Viresh Kumar , Vincent Guittot , ionela.voinescu@arm.com, Daniel Lezcano , chris.redpath@arm.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 06/15] arm: dts: sun: Add missing cooling device properties for CPUs Date: Fri, 25 May 2018 16:01:52 +0530 Message-Id: X-Mailer: git-send-email 2.15.0.194.g9af6a3dea062 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Fix other missing properties (clocks, OPP, clock latency) as well to make it all work. Signed-off-by: Viresh Kumar --- arch/arm/boot/dts/sun6i-a31.dtsi | 30 ++++++++++++++++++++++++++++++ arch/arm/boot/dts/sun7i-a20.dtsi | 13 +++++++++++++ arch/arm/boot/dts/sun8i-a33.dtsi | 9 +++++++++ arch/arm/boot/dts/sun8i-h3.dtsi | 9 +++++++++ 4 files changed, 61 insertions(+) -- 2.15.0.194.g9af6a3dea062 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index c72992556a86..debc0bf22ea3 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -119,18 +119,48 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + clocks = <&ccu CLK_CPU>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 1008000 1200000 + 864000 1200000 + 720000 1100000 + 480000 1000000 + >; + #cooling-cells = <2>; }; cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPU>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 1008000 1200000 + 864000 1200000 + 720000 1100000 + 480000 1000000 + >; + #cooling-cells = <2>; }; cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPU>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 1008000 1200000 + 864000 1200000 + 720000 1100000 + 480000 1000000 + >; + #cooling-cells = <2>; }; }; diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi index e529e4ff2174..35372a0cfc8d 100644 --- a/arch/arm/boot/dts/sun7i-a20.dtsi +++ b/arch/arm/boot/dts/sun7i-a20.dtsi @@ -122,6 +122,19 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + clocks = <&ccu CLK_CPU>; + clock-latency = <244144>; /* 8 32k periods */ + operating-points = < + /* kHz uV */ + 960000 1400000 + 912000 1400000 + 864000 1300000 + 720000 1200000 + 528000 1100000 + 312000 1000000 + 144000 1000000 + >; + #cooling-cells = <2>; }; }; diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi index 8d278ee001e9..4e92741b24a7 100644 --- a/arch/arm/boot/dts/sun8i-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a33.dtsi @@ -132,21 +132,30 @@ }; cpu@1 { + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; }; diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index 41d57c76f290..9dff6887923c 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -84,21 +84,30 @@ compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPUX>; + clock-names = "cpu"; operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; }; };