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[v1,0/4] arm64: mvebu: Support for Marvell 98DX2530 (and variants)

Message ID 20220310030039.2833808-1-chris.packham@alliedtelesis.co.nz
Headers show
Series arm64: mvebu: Support for Marvell 98DX2530 (and variants) | expand

Message

Chris Packham March 10, 2022, 3 a.m. UTC
This series adds support for the Marvell 98DX2530 SoC which is the Control and
Management CPU integrated into the AlleyCat5/AlleyCat5X series of Marvell
switches.

The CPU core is an ARM Cortex-A55 with neon, simd and crypto extensions.

This is fairly similar to the Armada-3700 SoC so most of the required
peripherals are already supported. This series adds a devicetree and pinctrl
driver for the SoC and the RD-AC5X-32G16HVG6HLG reference board.

Chris Packham (4):
  dt-bindings: pinctrl: mvebu: Document bindings for AC5
  pinctrl: mvebu: pinctrl driver for 98DX2530 SoC
  arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board
  arm64: marvell: enable the 98DX2530 pinctrl driver

 .../bindings/pinctrl/marvell,ac5-pinctrl.yaml |  73 +++
 arch/arm64/Kconfig.platforms                  |   2 +
 arch/arm64/boot/dts/marvell/Makefile          |   1 +
 .../boot/dts/marvell/armada-98dx2530.dtsi     | 459 ++++++++++++++++++
 arch/arm64/boot/dts/marvell/rd-ac5x.dts       |  27 ++
 drivers/pinctrl/mvebu/Kconfig                 |   4 +
 drivers/pinctrl/mvebu/Makefile                |   1 +
 drivers/pinctrl/mvebu/pinctrl-ac5.c           | 226 +++++++++
 8 files changed, 793 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
 create mode 100644 arch/arm64/boot/dts/marvell/armada-98dx2530.dtsi
 create mode 100644 arch/arm64/boot/dts/marvell/rd-ac5x.dts
 create mode 100644 drivers/pinctrl/mvebu/pinctrl-ac5.c

Comments

Andrew Lunn March 10, 2022, 1:59 p.m. UTC | #1
On Thu, Mar 10, 2022 at 04:00:37PM +1300, Chris Packham wrote:
> This pinctrl driver supports the 98DX25xx and 98DX35xx family of chips
> from Marvell. It is based on the Marvell SDK with additions for various
> (non-gpio) pin configurations based on the datasheet.
> 
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

Hi Chris

Past experience with pinctrl and gpio for mvebu is that developers get
GPI and GPO pins wrong. Are there any pins which are not GPIO but only
a subset, so only GPI or GPO?

  Andrew
Rob Herring March 10, 2022, 11:25 p.m. UTC | #2
On Thu, Mar 10, 2022 at 04:00:36PM +1300, Chris Packham wrote:
> Add JSON schema for marvell,ac5-pinctrl present on the Marvell 98DX2530
> SoC.
> 
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> ---
>  .../bindings/pinctrl/marvell,ac5-pinctrl.yaml | 73 +++++++++++++++++++
>  1 file changed, 73 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
> new file mode 100644
> index 000000000000..c7ab3d0e8420
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
> @@ -0,0 +1,73 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/marvell,ac5-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Marvell AC5 pin controller
> +
> +maintainers:
> +  - Chris Packham <chris.packham@alliedtelesis.co.nz>
> +
> +description:
> +  Bindings for Marvell's AC5 memory-mapped pin controller.
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: marvell,ac5-pinctrl
> +      - const: syscon
> +      - const: simple-mfd

How is this a 'syscon' or 'simple-mfd' For syscon, what other 
functions/registers does it have? For simple-mfd, what other functions? 
You haven't defined them in the schema.

blank line needed here.

> +  reg:
> +    maxItems: 1
> +
> +patternProperties:
> +  '-pins$':
> +    type: object
> +    $ref: pinmux-node.yaml#
> +
> +    properties:
> +      marvell,function:
> +        $ref: "/schemas/types.yaml#/definitions/string"
> +        description:
> +          Indicates the function to select.
> +        enum: [ gpio, i2c0, i2c1, nand, sdio, spi0, spi1, uart0, uart1, uart2, uart3 ]
> +
> +      marvell,pins:
> +        $ref: /schemas/types.yaml#/definitions/string-array
> +        description:
> +          Array of MPP pins to be used for the given function.
> +        minItems: 1
> +        items:
> +          enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9,
> +                  mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, mpp18, mpp19,
> +                  mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, mpp26, mpp27, mpp28, mpp29,
> +                  mpp30, mpp31, mpp32, mpp33, mpp34, mpp35, mpp36, mpp37, mpp38, mpp39,
> +                  mpp40, mpp41, mpp42, mpp43, mpp44, mpp45 ]
> +
> +allOf:
> +  - $ref: "pinctrl.yaml#"
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    pinctrl@80020100 {
> +      compatible = "marvell,ac5-pinctrl",
> +      "syscon", "simple-mfd";
> +      reg = <0x80020100 0x20>;
> +
> +      i2c0_pins: i2c0-pins {
> +        marvell,pins = "mpp26", "mpp27";
> +        marvell,function = "i2c0";
> +      };
> +
> +      i2c0_gpio: i2c0-gpio-pins {
> +        marvell,pins = "mpp26", "mpp27";
> +        marvell,function = "gpio";
> +      };
> +    };
> -- 
> 2.35.1
> 
>
Chris Packham March 10, 2022, 11:53 p.m. UTC | #3
Hi Rob,

On 11/03/22 12:25, Rob Herring wrote:
> On Thu, Mar 10, 2022 at 04:00:36PM +1300, Chris Packham wrote:
>> Add JSON schema for marvell,ac5-pinctrl present on the Marvell 98DX2530
>> SoC.
>>
>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
>> ---
>>   .../bindings/pinctrl/marvell,ac5-pinctrl.yaml | 73 +++++++++++++++++++
>>   1 file changed, 73 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
>> new file mode 100644
>> index 000000000000..c7ab3d0e8420
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
>> @@ -0,0 +1,73 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://scanmail.trustwave.com/?c=20988&d=5Iiq4o6Dmr7xiwkJNrr25TNxYxK78lIUEWeJ-yq0UA&u=http%3a%2f%2fdevicetree%2eorg%2fschemas%2fpinctrl%2fmarvell%2cac5-pinctrl%2eyaml%23
>> +$schema: http://scanmail.trustwave.com/?c=20988&d=5Iiq4o6Dmr7xiwkJNrr25TNxYxK78lIUEWPe_X2yXg&u=http%3a%2f%2fdevicetree%2eorg%2fmeta-schemas%2fcore%2eyaml%23
>> +
>> +title: Marvell AC5 pin controller
>> +
>> +maintainers:
>> +  - Chris Packham <chris.packham@alliedtelesis.co.nz>
>> +
>> +description:
>> +  Bindings for Marvell's AC5 memory-mapped pin controller.
>> +
>> +properties:
>> +  compatible:
>> +    items:
>> +      - const: marvell,ac5-pinctrl
>> +      - const: syscon
>> +      - const: simple-mfd
> How is this a 'syscon' or 'simple-mfd' For syscon, what other
> functions/registers does it have? For simple-mfd, what other functions?
> You haven't defined them in the schema.

It's in the vendor dts I have and it's likely there because 
marvell,armada-37xx-pinctrl.txt has the same syscon and simple-mfd 
compatibles. Looking at how this is used I think it's more like the 
older mvebu pinctrl devices. I'll remove these two compatibles and 
update the dtsi file.

>
> blank line needed here.
>
>> +  reg:
>> +    maxItems: 1
>> +
>> +patternProperties:
>> +  '-pins$':
>> +    type: object
>> +    $ref: pinmux-node.yaml#
>> +
>> +    properties:
>> +      marvell,function:
>> +        $ref: "/schemas/types.yaml#/definitions/string"
>> +        description:
>> +          Indicates the function to select.
>> +        enum: [ gpio, i2c0, i2c1, nand, sdio, spi0, spi1, uart0, uart1, uart2, uart3 ]
>> +
>> +      marvell,pins:
>> +        $ref: /schemas/types.yaml#/definitions/string-array
>> +        description:
>> +          Array of MPP pins to be used for the given function.
>> +        minItems: 1
>> +        items:
>> +          enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9,
>> +                  mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, mpp18, mpp19,
>> +                  mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, mpp26, mpp27, mpp28, mpp29,
>> +                  mpp30, mpp31, mpp32, mpp33, mpp34, mpp35, mpp36, mpp37, mpp38, mpp39,
>> +                  mpp40, mpp41, mpp42, mpp43, mpp44, mpp45 ]
>> +
>> +allOf:
>> +  - $ref: "pinctrl.yaml#"
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    pinctrl@80020100 {
>> +      compatible = "marvell,ac5-pinctrl",
>> +      "syscon", "simple-mfd";
>> +      reg = <0x80020100 0x20>;
>> +
>> +      i2c0_pins: i2c0-pins {
>> +        marvell,pins = "mpp26", "mpp27";
>> +        marvell,function = "i2c0";
>> +      };
>> +
>> +      i2c0_gpio: i2c0-gpio-pins {
>> +        marvell,pins = "mpp26", "mpp27";
>> +        marvell,function = "gpio";
>> +      };
>> +    };
>> -- 
>> 2.35.1
>>
>>
Chris Packham March 11, 2022, 3:25 a.m. UTC | #4
On 11/03/22 12:53, Chris Packham wrote:
> Hi Rob,
>
> On 11/03/22 12:25, Rob Herring wrote:
>> On Thu, Mar 10, 2022 at 04:00:36PM +1300, Chris Packham wrote:
>>> Add JSON schema for marvell,ac5-pinctrl present on the Marvell 98DX2530
>>> SoC.
>>>
>>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
>>> ---
>>>   .../bindings/pinctrl/marvell,ac5-pinctrl.yaml | 73 
>>> +++++++++++++++++++
>>>   1 file changed, 73 insertions(+)
>>>   create mode 100644 
>>> Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
>>>
>>> diff --git 
>>> a/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml 
>>> b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
>>> new file mode 100644
>>> index 000000000000..c7ab3d0e8420
>>> --- /dev/null
>>> +++ 
>>> b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
>>> @@ -0,0 +1,73 @@
>>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>>> +%YAML 1.2
>>> +---
>>> +$id: 
>>> http://scanmail.trustwave.com/?c=20988&d=5Iiq4o6Dmr7xiwkJNrr25TNxYxK78lIUEWeJ-yq0UA&u=http%3a%2f%2fdevicetree%2eorg%2fschemas%2fpinctrl%2fmarvell%2cac5-pinctrl%2eyaml%23
>>> +$schema: 
>>> http://scanmail.trustwave.com/?c=20988&d=5Iiq4o6Dmr7xiwkJNrr25TNxYxK78lIUEWPe_X2yXg&u=http%3a%2f%2fdevicetree%2eorg%2fmeta-schemas%2fcore%2eyaml%23
>>> +
>>> +title: Marvell AC5 pin controller
>>> +
>>> +maintainers:
>>> +  - Chris Packham <chris.packham@alliedtelesis.co.nz>
>>> +
>>> +description:
>>> +  Bindings for Marvell's AC5 memory-mapped pin controller.
>>> +
>>> +properties:
>>> +  compatible:
>>> +    items:
>>> +      - const: marvell,ac5-pinctrl
>>> +      - const: syscon
>>> +      - const: simple-mfd
>> How is this a 'syscon' or 'simple-mfd' For syscon, what other
>> functions/registers does it have? For simple-mfd, what other functions?
>> You haven't defined them in the schema.
>
> It's in the vendor dts I have and it's likely there because 
> marvell,armada-37xx-pinctrl.txt has the same syscon and simple-mfd 
> compatibles. Looking at how this is used I think it's more like the 
> older mvebu pinctrl devices. I'll remove these two compatibles and 
> update the dtsi file.
Actually turns out I do need the syscon compatible because the driver 
calls mvebu_pinctrl_simple_regmap_probe() which relies on the syscon 
compatible. I'm still not sure what to put in the binding doc other than 
"syscon" is needed because it is needed.
>
>>
>> blank line needed here.
>>
>>> +  reg:
>>> +    maxItems: 1
>>> +
>>> +patternProperties:
>>> +  '-pins$':
>>> +    type: object
>>> +    $ref: pinmux-node.yaml#
>>> +
>>> +    properties:
>>> +      marvell,function:
>>> +        $ref: "/schemas/types.yaml#/definitions/string"
>>> +        description:
>>> +          Indicates the function to select.
>>> +        enum: [ gpio, i2c0, i2c1, nand, sdio, spi0, spi1, uart0, 
>>> uart1, uart2, uart3 ]
>>> +
>>> +      marvell,pins:
>>> +        $ref: /schemas/types.yaml#/definitions/string-array
>>> +        description:
>>> +          Array of MPP pins to be used for the given function.
>>> +        minItems: 1
>>> +        items:
>>> +          enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, 
>>> mpp8, mpp9,
>>> +                  mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, 
>>> mpp17, mpp18, mpp19,
>>> +                  mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, mpp26, 
>>> mpp27, mpp28, mpp29,
>>> +                  mpp30, mpp31, mpp32, mpp33, mpp34, mpp35, mpp36, 
>>> mpp37, mpp38, mpp39,
>>> +                  mpp40, mpp41, mpp42, mpp43, mpp44, mpp45 ]
>>> +
>>> +allOf:
>>> +  - $ref: "pinctrl.yaml#"
>>> +
>>> +required:
>>> +  - compatible
>>> +  - reg
>>> +
>>> +additionalProperties: false
>>> +
>>> +examples:
>>> +  - |
>>> +    pinctrl@80020100 {
>>> +      compatible = "marvell,ac5-pinctrl",
>>> +      "syscon", "simple-mfd";
>>> +      reg = <0x80020100 0x20>;
>>> +
>>> +      i2c0_pins: i2c0-pins {
>>> +        marvell,pins = "mpp26", "mpp27";
>>> +        marvell,function = "i2c0";
>>> +      };
>>> +
>>> +      i2c0_gpio: i2c0-gpio-pins {
>>> +        marvell,pins = "mpp26", "mpp27";
>>> +        marvell,function = "gpio";
>>> +      };
>>> +    };
>>> -- 
>>> 2.35.1
>>>
>>>
Chris Packham March 11, 2022, 3:59 a.m. UTC | #5
On 11/03/22 16:25, Chris Packham wrote:
>
> On 11/03/22 12:53, Chris Packham wrote:
>> Hi Rob,
>>
>> On 11/03/22 12:25, Rob Herring wrote:
>>> On Thu, Mar 10, 2022 at 04:00:36PM +1300, Chris Packham wrote:
>>>> Add JSON schema for marvell,ac5-pinctrl present on the Marvell 
>>>> 98DX2530
>>>> SoC.
>>>>
>>>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
>>>> ---
>>>>   .../bindings/pinctrl/marvell,ac5-pinctrl.yaml | 73 
>>>> +++++++++++++++++++
>>>>   1 file changed, 73 insertions(+)
>>>>   create mode 100644 
>>>> Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
>>>>
>>>> diff --git 
>>>> a/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml 
>>>> b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
>>>> new file mode 100644
>>>> index 000000000000..c7ab3d0e8420
>>>> --- /dev/null
>>>> +++ 
>>>> b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml
>>>> @@ -0,0 +1,73 @@
>>>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>>>> +%YAML 1.2
>>>> +---
>>>> +$id: 
>>>> http://scanmail.trustwave.com/?c=20988&d=5Iiq4o6Dmr7xiwkJNrr25TNxYxK78lIUEWeJ-yq0UA&u=http%3a%2f%2fdevicetree%2eorg%2fschemas%2fpinctrl%2fmarvell%2cac5-pinctrl%2eyaml%23
>>>> +$schema: 
>>>> http://scanmail.trustwave.com/?c=20988&d=5Iiq4o6Dmr7xiwkJNrr25TNxYxK78lIUEWPe_X2yXg&u=http%3a%2f%2fdevicetree%2eorg%2fmeta-schemas%2fcore%2eyaml%23
>>>> +
>>>> +title: Marvell AC5 pin controller
>>>> +
>>>> +maintainers:
>>>> +  - Chris Packham <chris.packham@alliedtelesis.co.nz>
>>>> +
>>>> +description:
>>>> +  Bindings for Marvell's AC5 memory-mapped pin controller.
>>>> +
>>>> +properties:
>>>> +  compatible:
>>>> +    items:
>>>> +      - const: marvell,ac5-pinctrl
>>>> +      - const: syscon
>>>> +      - const: simple-mfd
>>> How is this a 'syscon' or 'simple-mfd' For syscon, what other
>>> functions/registers does it have? For simple-mfd, what other functions?
>>> You haven't defined them in the schema.
>>
>> It's in the vendor dts I have and it's likely there because 
>> marvell,armada-37xx-pinctrl.txt has the same syscon and simple-mfd 
>> compatibles. Looking at how this is used I think it's more like the 
>> older mvebu pinctrl devices. I'll remove these two compatibles and 
>> update the dtsi file.
> Actually turns out I do need the syscon compatible because the driver 
> calls mvebu_pinctrl_simple_regmap_probe() which relies on the syscon 
> compatible. I'm still not sure what to put in the binding doc other 
> than "syscon" is needed because it is needed.

I think I get it now. I need a syscon node to be the parent of my 
pinctrl node (and potentially others). That would also explain some 
things I was confused about with the gpio controllers. It's just that 
the vendor dts I've started with is woefully out of date w.r.t current 
best practice.

>>
>>>
>>> blank line needed here.
>>>
>>>> +  reg:
>>>> +    maxItems: 1
>>>> +
>>>> +patternProperties:
>>>> +  '-pins$':
>>>> +    type: object
>>>> +    $ref: pinmux-node.yaml#
>>>> +
>>>> +    properties:
>>>> +      marvell,function:
>>>> +        $ref: "/schemas/types.yaml#/definitions/string"
>>>> +        description:
>>>> +          Indicates the function to select.
>>>> +        enum: [ gpio, i2c0, i2c1, nand, sdio, spi0, spi1, uart0, 
>>>> uart1, uart2, uart3 ]
>>>> +
>>>> +      marvell,pins:
>>>> +        $ref: /schemas/types.yaml#/definitions/string-array
>>>> +        description:
>>>> +          Array of MPP pins to be used for the given function.
>>>> +        minItems: 1
>>>> +        items:
>>>> +          enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, 
>>>> mpp8, mpp9,
>>>> +                  mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, 
>>>> mpp17, mpp18, mpp19,
>>>> +                  mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, mpp26, 
>>>> mpp27, mpp28, mpp29,
>>>> +                  mpp30, mpp31, mpp32, mpp33, mpp34, mpp35, mpp36, 
>>>> mpp37, mpp38, mpp39,
>>>> +                  mpp40, mpp41, mpp42, mpp43, mpp44, mpp45 ]
>>>> +
>>>> +allOf:
>>>> +  - $ref: "pinctrl.yaml#"
>>>> +
>>>> +required:
>>>> +  - compatible
>>>> +  - reg
>>>> +
>>>> +additionalProperties: false
>>>> +
>>>> +examples:
>>>> +  - |
>>>> +    pinctrl@80020100 {
>>>> +      compatible = "marvell,ac5-pinctrl",
>>>> +      "syscon", "simple-mfd";
>>>> +      reg = <0x80020100 0x20>;
>>>> +
>>>> +      i2c0_pins: i2c0-pins {
>>>> +        marvell,pins = "mpp26", "mpp27";
>>>> +        marvell,function = "i2c0";
>>>> +      };
>>>> +
>>>> +      i2c0_gpio: i2c0-gpio-pins {
>>>> +        marvell,pins = "mpp26", "mpp27";
>>>> +        marvell,function = "gpio";
>>>> +      };
>>>> +    };
>>>> -- 
>>>> 2.35.1
>>>>
>>>>