From patchwork Thu Dec 28 15:15:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "larry.lai" X-Patchwork-Id: 758685 Received: from APC01-SG2-obe.outbound.protection.outlook.com (mail-sgaapc01on2134.outbound.protection.outlook.com [40.107.215.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4249CE56D; Thu, 28 Dec 2023 15:16:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=yunjingtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=yunjingtech.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=cp3wxd5VoVRge34z3pH8amivOxKa3U4PxHoVClTbTHK7//bVY70QhGdNZpSP7EIjc4vMUeXx5RVsdru2R69KhCFCMt8lbiypZsqT+j3x78K5s8kKm1EgQkwCLhsMglqihWbeiyOHtHP+KQwjeNdIB+IT4SYB8rT/ESw4yxs89RS7LbGuxodYjGNGIVYLKmLjJzGfHHOcapkajyKfu67IIJEw/8WrrkSGj3BxBGw6aPXlHKd8lKPLVWwLogZh7ALXvpozGM7u2Bo8Ltq5P6s8QNLK2Xzf00ChIGEk+hV/KsHaYrxi9Cs3ZCylE+wJc+FxeUJSl+2/nzQwcuPrc/MPhA== ARC-Message-Signature: i=1; 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Thu, 28 Dec 2023 15:16:13 +0000 Received: from SEYPR06MB6507.apcprd06.prod.outlook.com ([fe80::883b:97ce:6565:e5e]) by SEYPR06MB6507.apcprd06.prod.outlook.com ([fe80::883b:97ce:6565:e5e%4]) with mapi id 15.20.7135.019; Thu, 28 Dec 2023 15:16:12 +0000 From: "larry.lai" To: lee@kernel.org, andriy.shevchenko@linux.intel.com, linus.walleij@linaro.org, pavel@ucw.cz, krzk@kernel.org Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-leds@vger.kernel.org, GaryWang@aaeon.com.tw, musa.lin@yunjingtech.com, jack.chang@yunjingtech.com, noah.hung@yunjingtech.com, "larry.lai" Subject: [PATCH V8 0/3] Add support control UP board CPLD/FPGA pin control Date: Thu, 28 Dec 2023 23:15:41 +0800 Message-Id: <20231228151544.14408-1-larry.lai@yunjingtech.com> X-Mailer: git-send-email 2.17.1 X-ClientProxiedBy: SG2P153CA0039.APCP153.PROD.OUTLOOK.COM (2603:1096:4:c6::8) To SEYPR06MB6507.apcprd06.prod.outlook.com (2603:1096:101:177::9) Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SEYPR06MB6507:EE_|KL1PR06MB6650:EE_ X-MS-Office365-Filtering-Correlation-Id: 0eead564-e176-4df6-2e80-08dc07b7ec36 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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We want to upstream the UP board 40-pin GP-bus Kernel driver for giving the users better experience on the software release. (not just download from UP board github) These patches are generated from the Linux kernel mainline tag v6.0. This is the PATCH V8. It fixed and addressed Andy Shevchenko and Krzysztof Kozlowski review comments. larry.lai (3): mfd: Add support for UP board CPLD/FPGA pinctrl: Add support pin control for UP board CPLD/FPGA leds: Add support for UP board CPLD onboard LEDS drivers/leds/Kconfig | 10 + drivers/leds/Makefile | 1 + drivers/leds/leds-upboard.c | 154 ++++ drivers/mfd/Kconfig | 12 + drivers/mfd/Makefile | 1 + drivers/mfd/upboard-fpga.c | 364 ++++++++ drivers/pinctrl/Kconfig | 15 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/pinctrl-upboard.c | 1309 +++++++++++++++++++++++++++++ include/linux/mfd/upboard-fpga.h | 59 ++ 10 files changed, 1926 insertions(+) create mode 100644 drivers/leds/leds-upboard.c create mode 100644 drivers/mfd/upboard-fpga.c create mode 100644 drivers/pinctrl/pinctrl-upboard.c create mode 100644 include/linux/mfd/upboard-fpga.h base-commit: 4fe89d07dcc2804c8b562f6c7896a45643d34b2f