From patchwork Mon Feb 21 15:43:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 544533 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75475C43217 for ; Mon, 21 Feb 2022 15:44:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1359191AbiBUPpF (ORCPT ); Mon, 21 Feb 2022 10:45:05 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:38606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1379438AbiBUPoz (ORCPT ); Mon, 21 Feb 2022 10:44:55 -0500 Received: from laurent.telenet-ops.be (laurent.telenet-ops.be [IPv6:2a02:1800:110:4::f00:19]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CEABE22B28 for ; Mon, 21 Feb 2022 07:43:53 -0800 (PST) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed40:49dc:a1b5:3fe0:3d2b]) by laurent.telenet-ops.be with bizsmtp id xrjr2600P3YJRAw01rjrfY; Mon, 21 Feb 2022 16:43:52 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1nMAqt-001TTn-7I; Mon, 21 Feb 2022 16:43:51 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1nMAqs-006EhO-9q; Mon, 21 Feb 2022 16:43:50 +0100 From: Geert Uytterhoeven To: Linus Walleij , Rob Herring , Krzysztof Kozlowski Cc: LUU HOAI , linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2 00/12] pinctrl: renesas: Add R-Car S4-8 support Date: Mon, 21 Feb 2022 16:43:35 +0100 Message-Id: X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi all, This patch series adds pin control support for the Renesas R-Car S4-8 Soc. It is based on patches in the BSP by LUU HOAI, with many changes on top (see the individual patches). Changes compared to v1[1]: - Add Reviewed-by, - Fix whitespace in Makefile, - Remove GPIO and No-GPIO pins, pin function definitions, and registers that can only be accessed from the Control Domain, - Spin off clock and DTS patches into separate series, - Drop RFC state and widen audience. Serial console and I2C have been tested on the Renesas Spider development board. Thanks for your comments! [1] "[PATCH/RFC 00/15] arm64: renesas: Add-R-Car S4-8 Pin control support" https://lore.kernel.org/r/cover.1642599415.git.geert+renesas@glider.be Geert Uytterhoeven (11): pinctrl: renesas: Add PORT_GP_CFG_19 macros pinctrl: renesas: Initial R8A779F0 PFC support pinctrl: renesas: r8a779f0: Add SCIF pins, groups, and functions pinctrl: renesas: r8a779f0: Add I2C pins, groups, and functions pinctrl: renesas: r8a779f0: Add HSCIF pins, groups, and functions pinctrl: renesas: r8a779f0: Add INTC-EX pins, groups, and function pinctrl: renesas: r8a779f0: Add MMC pins, groups, and function pinctrl: renesas: r8a779f0: Add MSIOF pins, groups, and functions pinctrl: renesas: r8a779f0: Add PCIe pins, groups, and function pinctrl: renesas: r8a779f0: Add QSPI pins, groups, and functions pinctrl: renesas: r8a779f0: Add Ethernet pins, groups, and functions LUU HOAI (1): dt-bindings: pinctrl: renesas,pfc: Document r8a779f0 support .../bindings/pinctrl/renesas,pfc.yaml | 1 + drivers/pinctrl/renesas/Kconfig | 5 + drivers/pinctrl/renesas/Makefile | 1 + drivers/pinctrl/renesas/core.c | 6 + drivers/pinctrl/renesas/pfc-r8a779f0.c | 2126 +++++++++++++++++ drivers/pinctrl/renesas/sh_pfc.h | 9 +- 6 files changed, 2146 insertions(+), 2 deletions(-) create mode 100644 drivers/pinctrl/renesas/pfc-r8a779f0.c Reviewed-by: Yoshihiro Shimoda Acked-by: Rob Herring