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[209.132.180.67]) by mx.google.com with ESMTP id s8si22747474pas.426.2014.04.22.05.43.30; Tue, 22 Apr 2014 05:43:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932414AbaDVMn3 (ORCPT + 1 other); Tue, 22 Apr 2014 08:43:29 -0400 Received: from mail-we0-f177.google.com ([74.125.82.177]:52189 "EHLO mail-we0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932152AbaDVMn2 (ORCPT ); Tue, 22 Apr 2014 08:43:28 -0400 Received: by mail-we0-f177.google.com with SMTP id u57so4828227wes.22 for ; Tue, 22 Apr 2014 05:43:27 -0700 (PDT) X-Received: by 10.194.175.70 with SMTP id by6mr33545746wjc.3.1398170607182; Tue, 22 Apr 2014 05:43:27 -0700 (PDT) Received: from localhost.localdomain ([85.235.11.236]) by mx.google.com with ESMTPSA id or5sm61755257wjc.2.2014.04.22.05.43.25 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Apr 2014 05:43:26 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Alexandre Courbot , Linus Walleij , Thomas Gleixner Subject: [PATCH] gpio: put GPIO IRQs into their own lock class Date: Tue, 22 Apr 2014 14:43:21 +0200 Message-Id: <1398170601-2621-1-git-send-email-linus.walleij@linaro.org> X-Mailer: git-send-email 1.9.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-gpio@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: linus.walleij@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: 209.85.220.177 is neither permitted nor denied by best guess record for domain of patch+caf_=patchwork-forward=linaro.org@linaro.org) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Another feature that is duplicated in a number of GPIO irqchips is that these cascades IRQs are assigned their own lock class so as to avoid warnings about lockdep recursions. Do this also in the generic GPIO irqchip helpers for smooth transition to this core infrastructure. Cc: Thomas Gleixner Signed-off-by: Linus Walleij --- drivers/gpio/gpiolib.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index c12fe9dfd2db..ee1819fdcf35 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c @@ -1377,6 +1377,12 @@ void gpiochip_set_chained_irqchip(struct gpio_chip *gpiochip, } EXPORT_SYMBOL_GPL(gpiochip_set_chained_irqchip); +/* + * This lock class tells lockdep that GPIO irqs are in a different + * category than their parents, so it won't report false recursion. + */ +static struct lock_class_key gpiochip_irq_lock_class; + /** * gpiochip_irq_map() - maps an IRQ into a GPIO irqchip * @d: the irqdomain used by this irqchip @@ -1393,6 +1399,7 @@ static int gpiochip_irq_map(struct irq_domain *d, unsigned int irq, struct gpio_chip *chip = d->host_data; irq_set_chip_data(irq, chip); + irq_set_lockdep_class(irq, &gpiochip_irq_lock_class); irq_set_chip_and_handler(irq, chip->irqchip, chip->irq_handler); /* Chips that can sleep need nested thread handlers */ if (chip->can_sleep)