From patchwork Fri Jun 14 07:35:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 166794 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp1710114ilk; Fri, 14 Jun 2019 00:35:49 -0700 (PDT) X-Google-Smtp-Source: APXvYqxy+rFYSh8cUtD4htgxtJ09F/o3E8roy7BEP0cffycmI1LePeeepHQ3hplp6E6kIkUSRJQ3 X-Received: by 2002:aa7:921a:: with SMTP id 26mr53467130pfo.99.1560497749794; Fri, 14 Jun 2019 00:35:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1560497749; cv=none; d=google.com; s=arc-20160816; b=HHwhpdSa+x+zLpH0VabqVr0V8ZChwFhz+4Mqtfg7DeAQ7gPBYChMDJOAJm6Pxa5frN fu7efnj2AfFAW9QWwToyaP+YxIwcV6avdNAPCqSlQtXO16DSTRK50JbAqE0LGcA9/jmn q1zhCXMK5L/7UGyqI7FnSIxLETe2W5YoooMypfSngfDyxZO1rmGKn3MnhOilrn4Sk5TA 1w54Mt9BGMiNN0TEQPPxwcFf0FhhiWJlQA7/N87fBPgFxRf71RuF3sdNcJS5UXZhR5jD rA/bvf95jCFDi9Jnb9Cdo0nTeAJOU1eWeVsqLNdLyQZzOcyHgBeyni//CrYomX1H7qmC KatQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=bsupIOWqoJH/kMhN2nTkz9PNJKkLMDNwKGxm6GhBcdU=; b=SreBLOuDX3AxcM17ZaWPymvDg2L0Buz4E1FJ4ojl6A7KVPDbIUpcIdkm3CptAGjZgo Gfso5MrucqjQQUJ62cEysTHbYHC2xohMFK9AOwxe4cybLtW6ALGPStX6BdukAiGLC3fy lpRMuluzuwznfw6jAU/aVJc3BbzvVngH1nAeSuYiPPwuI3jbY9oAZtj615bEnVfe0AH4 iLVc6654GRcIn1o+aoN7us/pB3ZZdnb9fhz/X8tVl7QeShd6ScN3ynGVpFiR1d2Hc2mu 8HZIUA/vXVarnH1Gku9Aj8It21fLqhxQcudFB61V78UEP7Jp3DSk409or6zmv3KP5/wA RgqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yiyihh9t; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m20si1654813pjn.40.2019.06.14.00.35.49; Fri, 14 Jun 2019 00:35:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yiyihh9t; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725775AbfFNHfs (ORCPT + 5 others); Fri, 14 Jun 2019 03:35:48 -0400 Received: from mail-lj1-f194.google.com ([209.85.208.194]:37946 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725789AbfFNHfs (ORCPT ); Fri, 14 Jun 2019 03:35:48 -0400 Received: by mail-lj1-f194.google.com with SMTP id r9so1345167ljg.5 for ; Fri, 14 Jun 2019 00:35:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=bsupIOWqoJH/kMhN2nTkz9PNJKkLMDNwKGxm6GhBcdU=; b=yiyihh9tI0ivkkzZOhrGulBibxciFhHPoXrNYR2xdk8LGn434eANVRFWBXy812vGkr 8+gLp5vecFYS60E1SrmupApmOsWZ51fMD0LsYvF0NGx7ENaYZ1sJ2j8+ZAoSlKuaaScf vC4Kqbv829A3C5Kbxc0a98oXYDv/lZab6zFZwWdzUkmoXpXsDCrxq/MMhko6poZPcFry GyDMJwezHTPFxuFL0NdJkHJHMoRXsjGLqirpWppYMKSi2B87JKKU4ziB5/XcwLh0ajlr leqiqCG/i+TVIXGwGbdZmW5htmEUcLV3MHDftGOzp5R3qQOpmIynGM/+/1ShQTus9V6B aHaw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=bsupIOWqoJH/kMhN2nTkz9PNJKkLMDNwKGxm6GhBcdU=; b=s0uZjxYb37AYnvAqxelg43vre+CUMFwa8GuGA6XPo75Y2sbek2wbJGrjKYzU9ywhLn czwawldlpkbub8tFreVs74SiHlQSE6IIQ6YNT1zXWU1sIMqI1stWm2kydYvXDOUUtoed P/E5LO8C1QaZyW5gsXkQW8rS8OeGpeyPnDEe+nI+V+lmZjeadyEhEdrzhUeJO68g1k0D gGzsZbBnm3MRfRk256t/hq37/hCtlBDi9nhNcoXuKhoHPAhMY2dflp3KmEnytLY/v4Dl WuY86Ie4tal04LGtow4SwLz3PwgEMJZDsaYGddNxqGOyiwWyfv6ljGSw2FF+zxenfD2K 0cIQ== X-Gm-Message-State: APjAAAXlB/XKjEStV1BnjL1LgWTXt4+14zzolxnTS+ouO9t098A1J6kr 8smXeBnTA5OZiskg/eSudcZvQcRp17o= X-Received: by 2002:a2e:9ad1:: with SMTP id p17mr18417204ljj.34.1560497745215; Fri, 14 Jun 2019 00:35:45 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id k8sm431008lja.24.2019.06.14.00.35.43 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Fri, 14 Jun 2019 00:35:43 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Bartosz Golaszewski , Linus Walleij , Thierry Reding Subject: [PATCH] gpio: Add GPIOLIB_IRQCHIP cleanup to TODO Date: Fri, 14 Jun 2019 09:35:41 +0200 Message-Id: <20190614073541.5591-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We now have two APIs for registering GPIOLIB_IRQCHIP, this is not working and creating confusion. Add a TODO item to fix it up. Cc: Thierry Reding Signed-off-by: Linus Walleij --- drivers/gpio/TODO | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) -- 2.20.1 diff --git a/drivers/gpio/TODO b/drivers/gpio/TODO index 19d27c904916..1cd57f0bc0c3 100644 --- a/drivers/gpio/TODO +++ b/drivers/gpio/TODO @@ -90,6 +90,46 @@ GPIOLIB irqchip The GPIOLIB irqchip is a helper irqchip for "simple cases" that should try to cover any generic kind of irqchip cascaded from a GPIO. +- Convert all the GPIOLIB_IRQCHIP users to pass an irqchip template, + parent and flags before calling [devm_]gpiochip_add[_data](). + Currently we set up the irqchip after setting up the gpiochip + using gpiochip_irqchip_add() and gpiochip_set_[chained|nested]_irqchip(). + This is too complex, so convert all users over to just set up + the irqchip before registering the gpio_chip, typical example: + + /* Typical state container with dynamic irqchip */ + struct my_gpio { + struct gpio_chip gc; + struct irq_chip irq; + }; + + int irq; /* from platform etc */ + struct my_gpio *g; + struct gpio_irq_chip *girq + + /* Set up the irqchip dynamically */ + g->irq.name = "my_gpio_irq"; + g->irq.irq_ack = my_gpio_ack_irq; + g->irq.irq_mask = my_gpio_mask_irq; + g->irq.irq_unmask = my_gpio_unmask_irq; + g->irq.irq_set_type = my_gpio_set_irq_type; + + /* Get a pointer to the gpio_irq_chip */ + girq = &g->gc.irq; + girq->chip = &g->irq; + girq->parent_handler = ftgpio_gpio_irq_handler; + girq->num_parents = 1; + girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents), + GFP_KERNEL); + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_bad_irq; + if (!girq->parents) + return -ENOMEM; + girq->parents[0] = irq; + + When this is done, we will delete the old APIs for instatiating + GPIOLIB_IRQCHIP and simplify the code. + - Look over and identify any remaining easily converted drivers and dry-code conversions to gpiolib irqchip for maintainers to test