From patchwork Wed Jul 31 19:56:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnd Bergmann X-Patchwork-Id: 170218 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp4437345ile; Wed, 31 Jul 2019 13:02:47 -0700 (PDT) X-Google-Smtp-Source: APXvYqznsmnOffSB01GkzH/A8zMW/qJB9xTsrmO0jRmSwOjBc2FvoXqohysDlBuNfzPCbSN2TAg/ X-Received: by 2002:a62:ab18:: with SMTP id p24mr49350350pff.113.1564603366960; Wed, 31 Jul 2019 13:02:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1564603366; cv=none; d=google.com; s=arc-20160816; b=wMJH/1KsSjl/QTxglFlBiaZnHgvtMZf6GXXiNkAbOJPBtzGs8B860oPN4/LT0H2vhU urG2ZSW4Kr45yJ3+ErVp4jn8o+F5mW7A94Fd8PvCCQ9dYAmwJ1ISPWdiwne0GBBHUMOP 8Bk1YJDz4zWzf9FHHBQJJGyt4AOWLt45pe73VeMgSUj8SITZIpRvINiPUSxOK8WCwTb/ NzLFXnFxArElrfMY/kDGyaLHEDOF82dk+mUOj6S+J/XCW5CFffXvZMier+f32diTJ5wA Z1rkkKqq+zcW1b+Tb3/feEjKufzt4cG7gQtWH1nBHjKTjJ99Ku/N3Fk/xtKN/+/cxmmP /I0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=zvkodgCrUb7vWKK6pr/2TYyCRcAnf89cCDMvJOucx5I=; b=Raignldwuh5leX7sqorjHf7jPhzdSbLQZlJ9FNKNj/Zp1fy44H0lHELEg8vZwxe7s8 rdJf/n2o365ZPW3d0ZoE7/Xqx/fbdtCAQq0byEyAKoOhCnEG4Ibu7YiR3JgGXk0mha5b GvQivMuDslGV3WGgTHcuvggwWG9xdZaspmZ9tqZDdVF6FeMo/C5xuR1Htp0hrIpLya+O IjxO/Ot63YnFx8UIYWtUJVQroGmY7a4QNiES3WZI+gyNO+ebxaNIhvrX49PYWtoTmrKG H5zRkdG1Q5l/4UiD6QzG/cgAYTl9XYUqwvKqUz2Kw9x4y6Z/Nz3RG/HWVuZ0OLZ+XMvB tXTQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j7si39438328pfi.10.2019.07.31.13.02.46; Wed, 31 Jul 2019 13:02:46 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730293AbfGaUCq (ORCPT + 5 others); Wed, 31 Jul 2019 16:02:46 -0400 Received: from mout.kundenserver.de ([212.227.126.135]:54159 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729280AbfGaUCq (ORCPT ); Wed, 31 Jul 2019 16:02:46 -0400 Received: from threadripper.lan ([149.172.19.189]) by mrelayeu.kundenserver.de (mreue012 [212.227.15.129]) with ESMTPA (Nemesis) id 1MyvFC-1iFEmI1isM-00vu1b; Wed, 31 Jul 2019 22:02:08 +0200 From: Arnd Bergmann To: soc@kernel.org, linux-arm-kernel@lists.infradead.org, Vladimir Zapolskiy , Sylvain Lemieux , Russell King , Gregory Clement , Linus Walleij Cc: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , "David S. Miller" , Greg Kroah-Hartman , Alan Stern , Guenter Roeck , linux-gpio@vger.kernel.org, netdev@vger.kernel.org, linux-serial@vger.kernel.org, linux-usb@vger.kernel.org, linux-watchdog@vger.kernel.org, Arnd Bergmann , Jiri Slaby , linux-kernel@vger.kernel.org Subject: [PATCH 09/14] serial: lpc32xx: allow compile testing Date: Wed, 31 Jul 2019 21:56:51 +0200 Message-Id: <20190731195713.3150463-10-arnd@arndb.de> X-Mailer: git-send-email 2.20.0 In-Reply-To: <20190731195713.3150463-1-arnd@arndb.de> References: <20190731195713.3150463-1-arnd@arndb.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:U34UKG0WKd1du7DGye/96IP8sexEkIzBlk61JFzClDj31SLKqCI wfz+noGeI4XYslZMxD9cagGBYN/PWTDbo26SLz707TH/Ua6X9hBQLqZGlOQJxZ8AQi6UI9o cSjmHqUz43Veryx8v4Q1bfVU25rLjk0jJYvgztz+l1bZMNCjzxpn2Oz4oZ+VdmqEv+N2NyI AK7H4/I5OUe/oZGljJ50A== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1; V03:K0:xpMEYv/5InE=:SJjD2WgwLQK7f/E7eG49m1 ORCHWdS6/lv4MHlAX9BAyyAzpJ37dQYNMkXKmZj2nREnuOPDQi8KABrnPacczrAz27FJOfXrx R8OpIbGHb1OZXerV+HbTvHFFmIRMylgwXzscLtC9Lw21WwjNzEfvk5VXvk+RXedvozf707BnR gLKPap9ZJE1WdxxphI0eL3/CfKAz+4eWAxdfGq0g701jnm8txJekpOspq/R+klU7jVStL/qlo uFX4imePVsjfkU3XUgKN/J49zj/WCVXzjl5+bEfQrJzdneGQcuMy5Dflv1C9rJC1guUOKEClr D+MCibHfsUeL73Pz8TjL+aEee1QYidg9uAWVZVE6IO8u3yq4CJ+yRTDbQKlq8xtIz7RauM6Wo 2fzPgU5667Cs1YTWGXcBfPTSFcqcrGUl+7Db+yzjwvHi8W4s+cc9pZyw1lOlCEjkBUKpyXUGq 8oanZOfS4SDpK0V/rh8bp5wAytZ+pa58Nv0NkuphQIm1NgbZutoGbqzO+hSy87q1xXM0LmxVK C2vmeJ/BVUkQK9gGduSd5IZghQq/S65gYcPY34ce41IlP9mie+7rNba87dk+9KIQdEU1FkHt7 X/yu8Ev+mtMh5TQ8dP6o8gN1sNmc7ClBxwoMKNTbwQpTWhCggqRcZjVGcKgpYb4j65PeB1vgB zeQT+UXcTgGAOM/3NC2qSmGn6Dv0v/AuPh4G7fl00U4rgcXkRG1axjkHib/qYlhLxUc3YNvXv y/20aDue/cmZNdH9zEwtoYWsepgqu1h0QGyRXw== Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The lpc32xx_loopback_set() function in hte lpc32xx_hs driver is the one thing that relies on platform header files. Move that into the core platform code so we only need a variable declaration for it, and enable COMPILE_TEST building. Signed-off-by: Arnd Bergmann --- arch/arm/mach-lpc32xx/serial.c | 30 ++++++++++++++++++++++++ drivers/tty/serial/lpc32xx_hs.c | 35 ++++------------------------ include/linux/soc/nxp/lpc32xx-misc.h | 4 ++++ 3 files changed, 38 insertions(+), 31 deletions(-) -- 2.20.0 diff --git a/arch/arm/mach-lpc32xx/serial.c b/arch/arm/mach-lpc32xx/serial.c index 3f9b30df9f0e..cfb35e5691cd 100644 --- a/arch/arm/mach-lpc32xx/serial.c +++ b/arch/arm/mach-lpc32xx/serial.c @@ -60,6 +60,36 @@ static struct uartinit uartinit_data[] __initdata = { }, }; +/* LPC3250 Errata HSUART.1: Hang workaround via loopback mode on inactivity */ +void lpc32xx_loopback_set(resource_size_t mapbase, int state) +{ + int bit; + u32 tmp; + + switch (mapbase) { + case LPC32XX_HS_UART1_BASE: + bit = 0; + break; + case LPC32XX_HS_UART2_BASE: + bit = 1; + break; + case LPC32XX_HS_UART7_BASE: + bit = 6; + break; + default: + WARN(1, "lpc32xx_hs: Warning: Unknown port at %08x\n", mapbase); + return; + } + + tmp = readl(LPC32XX_UARTCTL_CLOOP); + if (state) + tmp |= (1 << bit); + else + tmp &= ~(1 << bit); + writel(tmp, LPC32XX_UARTCTL_CLOOP); +} +EXPORT_SYMBOL_GPL(lpc32xx_loopback_set); + void __init lpc32xx_serial_init(void) { u32 tmp, clkmodes = 0; diff --git a/drivers/tty/serial/lpc32xx_hs.c b/drivers/tty/serial/lpc32xx_hs.c index 7f14cd8fac47..d3843f722182 100644 --- a/drivers/tty/serial/lpc32xx_hs.c +++ b/drivers/tty/serial/lpc32xx_hs.c @@ -25,6 +25,8 @@ #include #include #include +#include +#include /* * High Speed UART register offsets @@ -79,6 +81,8 @@ #define LPC32XX_HSU_TX_TL8B (0x2 << 0) #define LPC32XX_HSU_TX_TL16B (0x3 << 0) +#define LPC32XX_MAIN_OSC_FREQ 13000000 + #define MODNAME "lpc32xx_hsuart" struct lpc32xx_hsuart_port { @@ -149,8 +153,6 @@ static void lpc32xx_hsuart_console_write(struct console *co, const char *s, local_irq_restore(flags); } -static void lpc32xx_loopback_set(resource_size_t mapbase, int state); - static int __init lpc32xx_hsuart_console_setup(struct console *co, char *options) { @@ -437,35 +439,6 @@ static void serial_lpc32xx_break_ctl(struct uart_port *port, spin_unlock_irqrestore(&port->lock, flags); } -/* LPC3250 Errata HSUART.1: Hang workaround via loopback mode on inactivity */ -static void lpc32xx_loopback_set(resource_size_t mapbase, int state) -{ - int bit; - u32 tmp; - - switch (mapbase) { - case LPC32XX_HS_UART1_BASE: - bit = 0; - break; - case LPC32XX_HS_UART2_BASE: - bit = 1; - break; - case LPC32XX_HS_UART7_BASE: - bit = 6; - break; - default: - WARN(1, "lpc32xx_hs: Warning: Unknown port at %08x\n", mapbase); - return; - } - - tmp = readl(LPC32XX_UARTCTL_CLOOP); - if (state) - tmp |= (1 << bit); - else - tmp &= ~(1 << bit); - writel(tmp, LPC32XX_UARTCTL_CLOOP); -} - /* port->lock is not held. */ static int serial_lpc32xx_startup(struct uart_port *port) { diff --git a/include/linux/soc/nxp/lpc32xx-misc.h b/include/linux/soc/nxp/lpc32xx-misc.h index af4f82f6cf3b..699c6f1e3aab 100644 --- a/include/linux/soc/nxp/lpc32xx-misc.h +++ b/include/linux/soc/nxp/lpc32xx-misc.h @@ -14,6 +14,7 @@ #ifdef CONFIG_ARCH_LPC32XX extern u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr); extern void lpc32xx_set_phy_interface_mode(phy_interface_t mode); +extern void lpc32xx_loopback_set(resource_size_t mapbase, int state); #else static inline u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaaddr) { @@ -24,6 +25,9 @@ static inline u32 lpc32xx_return_iram(void __iomem **mapbase, dma_addr_t *dmaadd static inline void lpc32xx_set_phy_interface_mode(phy_interface_t mode) { } +static inline void lpc32xx_loopback_set(resource_size_t mapbase, int state) +{ +} #endif #endif /* __SOC_LPC32XX_MISC_H */