From patchwork Fri Oct 13 14:59:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 733788 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C95AECDB484 for ; Fri, 13 Oct 2023 14:59:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232241AbjJMO7o (ORCPT ); Fri, 13 Oct 2023 10:59:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57882 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232221AbjJMO7n (ORCPT ); Fri, 13 Oct 2023 10:59:43 -0400 Received: from mail-wm1-x330.google.com (mail-wm1-x330.google.com [IPv6:2a00:1450:4864:20::330]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C69B495 for ; Fri, 13 Oct 2023 07:59:41 -0700 (PDT) Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-405524e6769so14282535e9.1 for ; Fri, 13 Oct 2023 07:59:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697209180; x=1697813980; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=6XixNF8rcGeT14/86b+PK/uBZUvKiNOeydeAMM5h+qM=; b=Lsi3e3LGJnfI/w5D3y8+oG85IYXqdA7QV5Yc662qKbFs6tbGpGMj51Ai+JNrvxYoLy Ur/bqy/Wlw2/B+8XkCOBACG51kwuOd25UfBThoJBjlupbgRFI2cmHdO/EJBbU0IFk3T0 OY+T3zRP5IBFVYgBJVsXjxESVuLiNPoDn6EgC83950Ys5PiVAaO041DlaixhKYxlhq2Q LscH0K+3x4YeEU3uTZiTBYgSxCy09aREGkIGdqdGerxjpqK4l2ZZG82eyC3dMFFi0F5H a77MEftT56uQzn+fePmggD6ojY9B9bZPrhCofp9YSMus4mLgYr5I3ZQdt1zSHpbWu7kz TPig== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697209180; x=1697813980; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=6XixNF8rcGeT14/86b+PK/uBZUvKiNOeydeAMM5h+qM=; b=C/Xbd140RdLixQvukqYS2qtzblVtDsVgR2M02mG7T2CLoZotIFGh9y8uMHfm32cDEJ WefJcvnYqeteWXgAng253Y2cH/ABpA33pLdH95ajrCpPe7pQv1DHzgEb2wpveuFYkus+ idfTBq4xB+3e3cGLQPbGTZ+kIoS4q3Ql5RFd/dokvtWtPKT2HUYuW9Of+JWRkPKasYHh Y4e1uu2KKPuYU/Iesh8t9tqsiraG39gYSDx1sCKsKvKDWqHiD5G3RG0rIbXPJkS02irH eLcdsBE+TQgh1XhaXDjcUqtGiSftpaoixnkrdIobJkCeeMhjaOOTEbrnVN/lQWpJNN1E z9nQ== X-Gm-Message-State: AOJu0YylSR4DgckJC6nC0oOfpRx8mzvmG24B3KwDROANZG+TNO7lTFX4 lfvEI+dh0mRNnInWNqof8L4Xsg== X-Google-Smtp-Source: AGHT+IEPQNQrI0nwaQkzVKmF+/qzLrm2eHCyV21p+KfzM81DrT5slU2YLvJSulhh31z+gRCVN4Fj7Q== X-Received: by 2002:a05:600c:3c83:b0:403:aced:f7f4 with SMTP id bg3-20020a05600c3c8300b00403acedf7f4mr308030wmb.12.1697209180272; Fri, 13 Oct 2023 07:59:40 -0700 (PDT) Received: from krzk-bin.. ([178.197.219.100]) by smtp.gmail.com with ESMTPSA id dh13-20020a0560000a8d00b00327cd5e5ac1sm6428267wrb.1.2023.10.13.07.59.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Oct 2023 07:59:39 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Linus Walleij , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH v2 1/2] pinctrl: qcom: lpass-lpi: split slew rate set to separate function Date: Fri, 13 Oct 2023 16:59:34 +0200 Message-Id: <20231013145935.220945-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231013145935.220945-1-krzysztof.kozlowski@linaro.org> References: <20231013145935.220945-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Setting slew rate for each pin will grow with upcoming Qualcomm SoCs, so split the code responsible for this into separate function for easier readability and maintenance. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Konrad Dybcio --- Changes in v2: 1. None --- drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 53 +++++++++++++++--------- 1 file changed, 33 insertions(+), 20 deletions(-) diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c index 9651aed048cf..4fb808545f7f 100644 --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c @@ -186,6 +186,35 @@ static int lpi_config_get(struct pinctrl_dev *pctldev, return 0; } +static int lpi_config_set_slew_rate(struct lpi_pinctrl *pctrl, + const struct lpi_pingroup *g, + unsigned int group, unsigned int slew) +{ + unsigned long sval; + int slew_offset; + + if (slew > LPI_SLEW_RATE_MAX) { + dev_err(pctrl->dev, "invalid slew rate %u for pin: %d\n", + slew, group); + return -EINVAL; + } + + slew_offset = g->slew_offset; + if (slew_offset == LPI_NO_SLEW) + return 0; + + mutex_lock(&pctrl->lock); + + sval = ioread32(pctrl->slew_base + LPI_SLEW_RATE_CTL_REG); + sval &= ~(LPI_SLEW_RATE_MASK << slew_offset); + sval |= slew << slew_offset; + iowrite32(sval, pctrl->slew_base + LPI_SLEW_RATE_CTL_REG); + + mutex_unlock(&pctrl->lock); + + return 0; +} + static int lpi_config_set(struct pinctrl_dev *pctldev, unsigned int group, unsigned long *configs, unsigned int nconfs) { @@ -193,8 +222,7 @@ static int lpi_config_set(struct pinctrl_dev *pctldev, unsigned int group, unsigned int param, arg, pullup = LPI_GPIO_BIAS_DISABLE, strength = 2; bool value, output_enabled = false; const struct lpi_pingroup *g; - unsigned long sval; - int i, slew_offset; + int i, ret; u32 val; g = &pctrl->data->groups[group]; @@ -226,24 +254,9 @@ static int lpi_config_set(struct pinctrl_dev *pctldev, unsigned int group, strength = arg; break; case PIN_CONFIG_SLEW_RATE: - if (arg > LPI_SLEW_RATE_MAX) { - dev_err(pctldev->dev, "invalid slew rate %u for pin: %d\n", - arg, group); - return -EINVAL; - } - - slew_offset = g->slew_offset; - if (slew_offset == LPI_NO_SLEW) - break; - - mutex_lock(&pctrl->lock); - - sval = ioread32(pctrl->slew_base + LPI_SLEW_RATE_CTL_REG); - sval &= ~(LPI_SLEW_RATE_MASK << slew_offset); - sval |= arg << slew_offset; - iowrite32(sval, pctrl->slew_base + LPI_SLEW_RATE_CTL_REG); - - mutex_unlock(&pctrl->lock); + ret = lpi_config_set_slew_rate(pctrl, g, group, arg); + if (ret) + return ret; break; default: return -EINVAL;