Message ID | 20231215143906.3651122-5-emil.renner.berthing@canonical.com |
---|---|
State | Accepted |
Commit | 0e6e3c6f7cb47ea1ae15a8148a6ddb30035c210e |
Headers | show
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Series |
Add T-Head TH15020 SoC pin control
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diff --git a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml index eefe7b345286..ab2afc0e4153 100644 --- a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml @@ -65,6 +65,8 @@ patternProperties: minItems: 1 maxItems: 32 + gpio-ranges: true + ngpios: default: 32 minimum: 1
Allow the generic gpio-ranges property so GPIOs can be mapped to their corresponding pin. This way control of GPIO on pins that are already used by other peripherals can be denied and basic pinconf can be done on pin controllers that support it. Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> --- Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml | 2 ++ 1 file changed, 2 insertions(+)