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AJvYcCU5aWU52JxYNRcfSR4nipOI7DFiKAdCwwBZAeEk39QvvGp9NzD+xEuxOrCWtop3w/tKFlHDomOLwFPs4mAxUt798s2mB8PTobL4MWTUWJ8wfXLSDJNIMmo0ALFd26zSohj3JQPYimi6VDgiFsRCIO3i2uswiU8vLEnpcSA0bs8pNvhbag== X-Gm-Message-State: AOJu0Yzen40dK07Wkmur9km8qIX4Pe619AMS3edf68+4o5A8uDNWyQ6o oq6uZuNYeF4SKJHRBeHlEUdBgyY5bO+HYwM82m/g3suwIpPHTrbX X-Google-Smtp-Source: AGHT+IHI8/qbHKCqz66RwWR9MqlbbVAzHtjtfiFY+x4cnGUA114FUitp2k639eLrpKnRZdgh9o8znQ== X-Received: by 2002:a05:600c:3c86:b0:412:8d98:78a with SMTP id bg6-20020a05600c3c8600b004128d98078amr17449379wmb.13.1709918892467; Fri, 08 Mar 2024 09:28:12 -0800 (PST) Received: from prasmi.home ([2a00:23c8:2500:a01:3c2e:cd45:f50f:f083]) by smtp.gmail.com with ESMTPSA id jh3-20020a05600ca08300b0041304100fa9sm6445317wmb.45.2024.03.08.09.28.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Mar 2024 09:28:11 -0800 (PST) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Chris Brandt , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Wolfram Sang Cc: linux-renesas-soc@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 2/5] dt-bindings: i2c: renesas,riic: Document R9A09G057 support Date: Fri, 8 Mar 2024 17:27:23 +0000 Message-Id: <20240308172726.225357-3-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240308172726.225357-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20240308172726.225357-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Lad Prabhakar Document support for the I2C Bus Interface (RIIC) available in the Renesas RZ/V2H (R9A09G057) SoC. The RIIC interface in the Renesas RZ/V2H differs from RZ/A in a couple of ways: - Register offsets for the RZ/V2H SoC differ from those of the RZ/A SoC. - RZ/V2H register access is 8-bit, whereas RZ/A supports 8/16/32-bit. - RZ/V2H has some bit differences in the slave address register. To accommodate these differences in the existing driver, a new compatible string "renesas,riic-r9a09g057" is added. Signed-off-by: Lad Prabhakar Reviewed-by: Fabrizio Castro --- .../devicetree/bindings/i2c/renesas,riic.yaml | 21 ++++++++++++------- 1 file changed, 13 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml index 63ac5fe3208d..2a7125688647 100644 --- a/Documentation/devicetree/bindings/i2c/renesas,riic.yaml +++ b/Documentation/devicetree/bindings/i2c/renesas,riic.yaml @@ -15,14 +15,19 @@ allOf: properties: compatible: - items: - - enum: - - renesas,riic-r7s72100 # RZ/A1H - - renesas,riic-r7s9210 # RZ/A2M - - renesas,riic-r9a07g043 # RZ/G2UL and RZ/Five - - renesas,riic-r9a07g044 # RZ/G2{L,LC} - - renesas,riic-r9a07g054 # RZ/V2L - - const: renesas,riic-rz # generic RIIC compatible + oneOf: + - items: + - enum: + - renesas,riic-r7s72100 # RZ/A1H + - renesas,riic-r7s9210 # RZ/A2M + - renesas,riic-r9a07g043 # RZ/G2UL and RZ/Five + - renesas,riic-r9a07g044 # RZ/G2{L,LC} + - renesas,riic-r9a07g054 # RZ/V2L + - const: renesas,riic-rz # generic RIIC compatible + + - items: + - enum: + - renesas,riic-r9a09g057 # RZ/V2H(P) reg: maxItems: 1