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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CH1PEPF0000AD77.mail.protection.outlook.com (10.167.244.55) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7409.10 via Frontend Transport; Wed, 27 Mar 2024 05:43:12 +0000 Received: from chalupa-4a00host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Wed, 27 Mar 2024 00:43:11 -0500 From: Manali Shukla To: , CC: , , , , , Subject: [PATCH v1 3/3] KVM: selftests: Add a test case for KVM_X86_DISABLE_EXITS_HLT Date: Wed, 27 Mar 2024 05:42:55 +0000 Message-ID: <20240327054255.24626-4-manali.shukla@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240327054255.24626-1-manali.shukla@amd.com> References: <20240327054255.24626-1-manali.shukla@amd.com> Precedence: bulk X-Mailing-List: linux-kselftest@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD77:EE_|DM4PR12MB5866:EE_ X-MS-Office365-Filtering-Correlation-Id: 527d1de0-10e3-4892-894c-08dc4e20cac9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Mar 2024 05:43:12.7268 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 527d1de0-10e3-4892-894c-08dc4e20cac9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD77.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5866 By default, HLT instruction executed by guest is intercepted by hypervisor. However, KVM_CAP_X86_DISABLE_EXITS capability can be used to not intercept HLT by setting KVM_X86_DISABLE_EXITS_HLT. Add a test case to test KVM_X86_DISABLE_EXITS_HLT functionality. Suggested-by: Sean Christopherson Signed-off-by: Manali Shukla --- tools/testing/selftests/kvm/Makefile | 1 + .../kvm/x86_64/halt_disable_exit_test.c | 113 ++++++++++++++++++ 2 files changed, 114 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86_64/halt_disable_exit_test.c diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile index c75251d5c97c..9f72abb95d2e 100644 --- a/tools/testing/selftests/kvm/Makefile +++ b/tools/testing/selftests/kvm/Makefile @@ -89,6 +89,7 @@ TEST_GEN_PROGS_x86_64 += x86_64/set_sregs_test TEST_GEN_PROGS_x86_64 += x86_64/smaller_maxphyaddr_emulation_test TEST_GEN_PROGS_x86_64 += x86_64/smm_test TEST_GEN_PROGS_x86_64 += x86_64/state_test +TEST_GEN_PROGS_x86_64 += x86_64/halt_disable_exit_test TEST_GEN_PROGS_x86_64 += x86_64/vmx_preemption_timer_test TEST_GEN_PROGS_x86_64 += x86_64/svm_vmcall_test TEST_GEN_PROGS_x86_64 += x86_64/svm_int_ctl_test diff --git a/tools/testing/selftests/kvm/x86_64/halt_disable_exit_test.c b/tools/testing/selftests/kvm/x86_64/halt_disable_exit_test.c new file mode 100644 index 000000000000..b7279dd0eaff --- /dev/null +++ b/tools/testing/selftests/kvm/x86_64/halt_disable_exit_test.c @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * KVM disable halt exit test + * + * Copyright (C) 2024 Advanced Micro Devices, Inc. + */ +#include +#include +#include "kvm_util.h" +#include "svm_util.h" +#include "processor.h" +#include "test_util.h" + +pthread_t task_thread, vcpu_thread; +#define SIG_IPI SIGUSR1 + +static void guest_code(uint8_t is_hlt_exec) +{ + while (!READ_ONCE(is_hlt_exec)) + ; + + safe_halt(); + GUEST_DONE(); +} + +static void *task_worker(void *arg) +{ + uint8_t *is_hlt_exec = (uint8_t *)arg; + + usleep(1000); + WRITE_ONCE(*is_hlt_exec, 1); + pthread_kill(vcpu_thread, SIG_IPI); + return 0; +} + +static void *vcpu_worker(void *arg) +{ + int ret; + int sig = -1; + uint8_t *is_hlt_exec = (uint8_t *)arg; + struct kvm_vm *vm; + struct kvm_run *run; + struct kvm_vcpu *vcpu; + struct kvm_signal_mask *sigmask = alloca(offsetof(struct kvm_signal_mask, sigset) + + sizeof(sigset_t)); + sigset_t *sigset = (sigset_t *) &sigmask->sigset; + + /* Create a VM without in kernel APIC support */ + vm = __vm_create(VM_SHAPE_DEFAULT, 1, 0, false); + vm_enable_cap(vm, KVM_CAP_X86_DISABLE_EXITS, KVM_X86_DISABLE_EXITS_HLT); + vcpu = vm_vcpu_add(vm, 0, guest_code); + vcpu_args_set(vcpu, 1, *is_hlt_exec); + + /* + * SIG_IPI is unblocked atomically while in KVM_RUN. It causes the + * ioctl to return with -EINTR, but it is still pending and we need + * to accept it with the sigwait. + */ + sigmask->len = 8; + pthread_sigmask(0, NULL, sigset); + sigdelset(sigset, SIG_IPI); + vcpu_ioctl(vcpu, KVM_SET_SIGNAL_MASK, sigmask); + sigemptyset(sigset); + sigaddset(sigset, SIG_IPI); + run = vcpu->run; + +again: + ret = __vcpu_run(vcpu); + TEST_ASSERT_EQ(errno, EINTR); + + if (ret == -1 && errno == EINTR) { + sigwait(sigset, &sig); + assert(sig == SIG_IPI); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_INTR); + goto again; + } + + if (run->exit_reason == KVM_EXIT_HLT) + TEST_FAIL("Expected KVM_EXIT_INTR, got KVM_EXIT_HLT"); + + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + kvm_vm_free(vm); + return 0; +} + +int main(int argc, char *argv[]) +{ + int ret; + void *retval; + uint8_t is_halt_exec; + sigset_t sigset; + + TEST_REQUIRE(kvm_has_cap(KVM_CAP_X86_DISABLE_EXITS)); + + /* Ensure that vCPU threads start with SIG_IPI blocked. */ + sigemptyset(&sigset); + sigaddset(&sigset, SIG_IPI); + pthread_sigmask(SIG_BLOCK, &sigset, NULL); + + ret = pthread_create(&vcpu_thread, NULL, vcpu_worker, &is_halt_exec); + TEST_ASSERT(ret == 0, "pthread_create vcpu thread failed errno=%d", errno); + + ret = pthread_create(&task_thread, NULL, task_worker, &is_halt_exec); + TEST_ASSERT(ret == 0, "pthread_create task thread failed errno=%d", errno); + + pthread_join(vcpu_thread, &retval); + TEST_ASSERT(ret == 0, "pthread_join on vcpu thread failed with errno=%d", ret); + + pthread_join(task_thread, &retval); + TEST_ASSERT(ret == 0, "pthread_join on task thread failed with errno=%d", ret); + + return 0; +}