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[v3,0/6] ARM: dts: sun8i: v3s: Enable video decoder

Message ID 20201116125617.7597-1-m.cerveny@computer.org
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Series ARM: dts: sun8i: v3s: Enable video decoder | expand

Message

Martin Cerveny Nov. 16, 2020, 12:56 p.m. UTC
First patch extends cedrus capability to all decoders
because V3s missing MPEG2 decoder.

Next two patches add system control node (SRAM C1) and 
next three patches add support for Cedrus VPU.

Tested on "Lichee Zero" V3s platform with testing LCD patch
( https://github.com/mcerveny/linux/tree/media_tree_for-v5.11e )
and V4L2 raw API testing utility (updated to v5.10)
( https://github.com/mcerveny/v4l2-request-test ):
- enabled LCD (DRM dual VI and sigle UI planes)
- added RGB panel
- enabled PWM
- need additional patch https://git.linuxtv.org/media_tree.git/commit/?h=fixes&id=9ac924b98728c3733c91c6c59fc410827d0da49f

There is low memory on V3s (64MB) and maximum must be available to CMA:
- CONFIG_CMA_SIZE_MBYTES=28
- add swap to swapout other processes
- decrease buffers in v4l2-request-test (.buffers_count from 16 to 8)

Only H.264 decoder working - MPEG and H.265 unsupported by V3s,
JPEG/MJPEG still unimplemented, encoder unimplemented

best regards,
Martin

Changes since v2:
- updated/rebased to https://git.linuxtv.org/hverkuil/media_tree.git/?h=for-v5.11e
- some parts of patches implemeted by others
- updated R40
Changes since v1:
- patch 0005 rename
- added testing description

Martin Cerveny (6):
  media: cedrus: Register all codecs as capability
  dt-bindings: sram: allwinner,sun4i-a10-system-control: Add V3s
    compatibles
  ARM: dts: sun8i: v3s: Add node for system control
  media: cedrus: Add support for V3s
  dt-bindings: media: cedrus: Add V3s compatible
  ARM: dts: sun8i: v3s: Add video engine node

 .../allwinner,sun4i-a10-video-engine.yaml     |  1 +
 .../allwinner,sun4i-a10-system-control.yaml   |  3 ++
 arch/arm/boot/dts/sun8i-v3s.dtsi              | 24 ++++++++++++++
 drivers/staging/media/sunxi/cedrus/cedrus.c   | 32 +++++++++++++++++--
 drivers/staging/media/sunxi/cedrus/cedrus.h   |  2 ++
 .../staging/media/sunxi/cedrus/cedrus_video.c |  2 ++
 6 files changed, 62 insertions(+), 2 deletions(-)

Comments

Rob Herring (Arm) Dec. 1, 2020, 7:38 p.m. UTC | #1
On Mon, 16 Nov 2020 13:56:13 +0100, Martin Cerveny wrote:
> Allwinner V3s has system control similar to that in H3.

> Add compatibles for system control with SRAM C1 region.

> 

> Signed-off-by: Martin Cerveny <m.cerveny@computer.org>

> ---

>  .../bindings/sram/allwinner,sun4i-a10-system-control.yaml      | 3 +++

>  1 file changed, 3 insertions(+)

> 


Reviewed-by: Rob Herring <robh@kernel.org>
Hans Verkuil Dec. 2, 2020, 2:35 p.m. UTC | #2
Hi Martin, Maxime,

On 16/11/2020 13:56, Martin Cerveny wrote:
> First patch extends cedrus capability to all decoders
> because V3s missing MPEG2 decoder.
> 
> Next two patches add system control node (SRAM C1) and 
> next three patches add support for Cedrus VPU.

I've picked up patches 1, 4 and 5 for the media subsystem.
Maxime, can you pick up the other three?

Thanks!

	Hans

> 
> Tested on "Lichee Zero" V3s platform with testing LCD patch
> ( https://github.com/mcerveny/linux/tree/media_tree_for-v5.11e )
> and V4L2 raw API testing utility (updated to v5.10)
> ( https://github.com/mcerveny/v4l2-request-test ):
> - enabled LCD (DRM dual VI and sigle UI planes)
> - added RGB panel
> - enabled PWM
> - need additional patch https://git.linuxtv.org/media_tree.git/commit/?h=fixes&id=9ac924b98728c3733c91c6c59fc410827d0da49f
> 
> There is low memory on V3s (64MB) and maximum must be available to CMA:
> - CONFIG_CMA_SIZE_MBYTES=28
> - add swap to swapout other processes
> - decrease buffers in v4l2-request-test (.buffers_count from 16 to 8)
> 
> Only H.264 decoder working - MPEG and H.265 unsupported by V3s,
> JPEG/MJPEG still unimplemented, encoder unimplemented
> 
> best regards,
> Martin
> 
> Changes since v2:
> - updated/rebased to https://git.linuxtv.org/hverkuil/media_tree.git/?h=for-v5.11e
> - some parts of patches implemeted by others
> - updated R40
> Changes since v1:
> - patch 0005 rename
> - added testing description
> 
> Martin Cerveny (6):
>   media: cedrus: Register all codecs as capability
>   dt-bindings: sram: allwinner,sun4i-a10-system-control: Add V3s
>     compatibles
>   ARM: dts: sun8i: v3s: Add node for system control
>   media: cedrus: Add support for V3s
>   dt-bindings: media: cedrus: Add V3s compatible
>   ARM: dts: sun8i: v3s: Add video engine node
> 
>  .../allwinner,sun4i-a10-video-engine.yaml     |  1 +
>  .../allwinner,sun4i-a10-system-control.yaml   |  3 ++
>  arch/arm/boot/dts/sun8i-v3s.dtsi              | 24 ++++++++++++++
>  drivers/staging/media/sunxi/cedrus/cedrus.c   | 32 +++++++++++++++++--
>  drivers/staging/media/sunxi/cedrus/cedrus.h   |  2 ++
>  .../staging/media/sunxi/cedrus/cedrus_video.c |  2 ++
>  6 files changed, 62 insertions(+), 2 deletions(-)
>
Chen-Yu Tsai Dec. 3, 2020, 4:20 a.m. UTC | #3
Hi,

On Mon, Nov 16, 2020 at 8:57 PM Martin Cerveny <m.cerveny@computer.org> wrote:
>

> Allwinner V3s has system control and SRAM C1 region similar to H3.

>

> Signed-off-by: Martin Cerveny <m.cerveny@computer.org>

> ---

>  arch/arm/boot/dts/sun8i-v3s.dtsi | 14 ++++++++++++++

>  1 file changed, 14 insertions(+)

>

> diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi

> index 0c7341676921..70193512c222 100644

> --- a/arch/arm/boot/dts/sun8i-v3s.dtsi

> +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi

> @@ -161,6 +161,20 @@ syscon: system-control@1c00000 {

>                         #address-cells = <1>;

>                         #size-cells = <1>;

>                         ranges;

> +

> +                       sram_c: sram@1d00000 {

> +                               compatible = "mmio-sram";

> +                               reg = <0x01d00000 0x80000>;


How was this address derived? Did you check that there is actually SRAM here?

ChenYu

> +                               #address-cells = <1>;

> +                               #size-cells = <1>;

> +                               ranges = <0 0x01d00000 0x80000>;

> +

> +                               ve_sram: sram-section@0 {

> +                                       compatible = "allwinner,sun8i-v3s-sram-c1",

> +                                                    "allwinner,sun4i-a10-sram-c1";

> +                                       reg = <0x000000 0x80000>;

> +                               };

> +                       };

>                 };

>

>                 tcon0: lcd-controller@1c0c000 {

> --

> 2.25.1

>

>

> _______________________________________________

> linux-arm-kernel mailing list

> linux-arm-kernel@lists.infradead.org

> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Martin Cerveny Dec. 3, 2020, 4:25 p.m. UTC | #4
Hello.

On Thu, 3 Dec 2020, Chen-Yu Tsai wrote:

> Hi,

>

> On Mon, Nov 16, 2020 at 8:57 PM Martin Cerveny <m.cerveny@computer.org> wrote:

>>

>> Allwinner V3s has system control and SRAM C1 region similar to H3.

>>

>> Signed-off-by: Martin Cerveny <m.cerveny@computer.org>

>> ---

>>  arch/arm/boot/dts/sun8i-v3s.dtsi | 14 ++++++++++++++

>>  1 file changed, 14 insertions(+)

>>

>> diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi

>> index 0c7341676921..70193512c222 100644

>> --- a/arch/arm/boot/dts/sun8i-v3s.dtsi

>> +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi

>> @@ -161,6 +161,20 @@ syscon: system-control@1c00000 {

>>                         #address-cells = <1>;

>>                         #size-cells = <1>;

>>                         ranges;

>> +

>> +                       sram_c: sram@1d00000 {

>> +                               compatible = "mmio-sram";

>> +                               reg = <0x01d00000 0x80000>;

>

> How was this address derived? Did you check that there is actually SRAM here?


Yes, I did some checking (mmap). But I repeated measurement and found 
mirrored regions:

- SRAM_C is mirrored from 0x0000_4000 (primary location) to 0x01d0_4000 (size 0xb000)
   (probably exact size is 0xb0c0)
- rest of 0x01d0_0000 are discontinuously filled with R/W register sets
   (probably some internals registers from VE) that I thought to be SRAM too
- register SRAM_CTRL_REG0==0x01c00_0000 (value 0x7fff_ffff) switch whole
   region 0x01d0_0000-0x01df_ffff __AND__ 0x0000_4000-0x0000_ffff
- VE/cedrus code use this regions indirectly
   (VE_AVC_SRAM_PORT_OFFSET/VE_AVC_SRAM_PORT_DATA...)
   and it is not influenced by "true" SRAM mapping or size

-> so I suppose to better use only SRAM_C lower definition:

---
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index e8f304125e2d..90d703e5b73b 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -162,17 +162,17 @@ syscon: system-control@1c00000 {
  			#size-cells = <1>;
  			ranges;

-			sram_c: sram@1d00000 {
+			sram_c: sram@4000 {
  				compatible = "mmio-sram";
-				reg = <0x01d00000 0x80000>;
+				reg = <0x4000 0xb000>;
  				#address-cells = <1>;
  				#size-cells = <1>;
-				ranges = <0 0x01d00000 0x80000>;
+				ranges = <0 0 0x4000 0xb000>;

  				ve_sram: sram-section@0 {
  					compatible = "allwinner,sun8i-v3s-sram-c1",
  						     "allwinner,sun4i-a10-sram-c1";
-					reg = <0x000000 0x80000>;
+					reg = <0x0 0xb000>;
  				};
  			};
  		};
---

Does someone have accessible specific documentation of VE/cedrus for V3s ?

Regards, Martin

> ChenYu

>

>> +                               #address-cells = <1>;

>> +                               #size-cells = <1>;

>> +                               ranges = <0 0x01d00000 0x80000>;

>> +

>> +                               ve_sram: sram-section@0 {

>> +                                       compatible = "allwinner,sun8i-v3s-sram-c1",

>> +                                                    "allwinner,sun4i-a10-sram-c1";

>> +                                       reg = <0x000000 0x80000>;

>> +                               };

>> +                       };

>>                 };

>>

>>                 tcon0: lcd-controller@1c0c000 {

>> --

>> 2.25.1

>>

>>

>> _______________________________________________

>> linux-arm-kernel mailing list

>> linux-arm-kernel@lists.infradead.org

>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

>
Chen-Yu Tsai Dec. 3, 2020, 4:44 p.m. UTC | #5
On Fri, Dec 4, 2020 at 12:25 AM Martin Cerveny <martin@c-home.cz> wrote:
>
> Hello.
>
> On Thu, 3 Dec 2020, Chen-Yu Tsai wrote:
>
> > Hi,
> >
> > On Mon, Nov 16, 2020 at 8:57 PM Martin Cerveny <m.cerveny@computer.org> wrote:
> >>
> >> Allwinner V3s has system control and SRAM C1 region similar to H3.
> >>
> >> Signed-off-by: Martin Cerveny <m.cerveny@computer.org>
> >> ---
> >>  arch/arm/boot/dts/sun8i-v3s.dtsi | 14 ++++++++++++++
> >>  1 file changed, 14 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
> >> index 0c7341676921..70193512c222 100644
> >> --- a/arch/arm/boot/dts/sun8i-v3s.dtsi
> >> +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
> >> @@ -161,6 +161,20 @@ syscon: system-control@1c00000 {
> >>                         #address-cells = <1>;
> >>                         #size-cells = <1>;
> >>                         ranges;
> >> +
> >> +                       sram_c: sram@1d00000 {
> >> +                               compatible = "mmio-sram";
> >> +                               reg = <0x01d00000 0x80000>;
> >
> > How was this address derived? Did you check that there is actually SRAM here?
>
> Yes, I did some checking (mmap). But I repeated measurement and found
> mirrored regions:
>
> - SRAM_C is mirrored from 0x0000_4000 (primary location) to 0x01d0_4000 (size 0xb000)
>    (probably exact size is 0xb0c0)
> - rest of 0x01d0_0000 are discontinuously filled with R/W register sets
>    (probably some internals registers from VE) that I thought to be SRAM too
> - register SRAM_CTRL_REG0==0x01c00_0000 (value 0x7fff_ffff) switch whole
>    region 0x01d0_0000-0x01df_ffff __AND__ 0x0000_4000-0x0000_ffff
> - VE/cedrus code use this regions indirectly
>    (VE_AVC_SRAM_PORT_OFFSET/VE_AVC_SRAM_PORT_DATA...)
>    and it is not influenced by "true" SRAM mapping or size

Could you add this to your commit log? That would make the information
available to others, and you could mention that you only added the
location that is contiguous SRAM without the interspersed registers.

So based on this, and what we've seen with the H616, I'm guessing
0x01d0_0000 - 0x01df_ffff exposes all the internal guts of the VE,
while SRAM C @ 0x4000 just maps a small portion out.

> -> so I suppose to better use only SRAM_C lower definition:

Yes that would be more appropriate, as it matches the manual, and as you
mentioned, is *real* SRAM.

> ---
> diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
> index e8f304125e2d..90d703e5b73b 100644
> --- a/arch/arm/boot/dts/sun8i-v3s.dtsi
> +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
> @@ -162,17 +162,17 @@ syscon: system-control@1c00000 {
>                         #size-cells = <1>;
>                         ranges;
>
> -                       sram_c: sram@1d00000 {
> +                       sram_c: sram@4000 {
>                                 compatible = "mmio-sram";
> -                               reg = <0x01d00000 0x80000>;
> +                               reg = <0x4000 0xb000>;
>                                 #address-cells = <1>;
>                                 #size-cells = <1>;
> -                               ranges = <0 0x01d00000 0x80000>;
> +                               ranges = <0 0 0x4000 0xb000>;
>
>                                 ve_sram: sram-section@0 {
>                                         compatible = "allwinner,sun8i-v3s-sram-c1",
>                                                      "allwinner,sun4i-a10-sram-c1";
> -                                       reg = <0x000000 0x80000>;
> +                                       reg = <0x0 0xb000>;
>                                 };
>                         };
>                 };
> ---
>
> Does someone have accessible specific documentation of VE/cedrus for V3s ?

I doubt such information exists.


Regards
ChenYu

> Regards, Martin
>
> > ChenYu
> >
> >> +                               #address-cells = <1>;
> >> +                               #size-cells = <1>;
> >> +                               ranges = <0 0x01d00000 0x80000>;
> >> +
> >> +                               ve_sram: sram-section@0 {
> >> +                                       compatible = "allwinner,sun8i-v3s-sram-c1",
> >> +                                                    "allwinner,sun4i-a10-sram-c1";
> >> +                                       reg = <0x000000 0x80000>;
> >> +                               };
> >> +                       };
> >>                 };
> >>
> >>                 tcon0: lcd-controller@1c0c000 {
> >> --
> >> 2.25.1
> >>
> >>
> >> _______________________________________________
> >> linux-arm-kernel mailing list
> >> linux-arm-kernel@lists.infradead.org
> >> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> >