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[RESEND,v3,00/13] add support MDP3 on MT8195 platform

Message ID 20230116032147.23607-1-moudy.ho@mediatek.com
Headers show
Series add support MDP3 on MT8195 platform | expand

Message

Moudy Ho Jan. 16, 2023, 3:21 a.m. UTC 
Changes since v2:
- Depend on :
  [1] MMSYS/MUTEX: https://patchwork.kernel.org/project/linux-mediatek/list/?series=711592
  [2] MDP3: https://patchwork.kernel.org/project/linux-mediatek/list/?series=711618
- Suggested by Rob to revise MDP3 bindings to pass dtbs check
- Add parallel paths feature.
- Add blended components settings.

Changes since v1:
- Depend on :
  [1] MDP3 : https://patchwork.kernel.org/project/linux-mediatek/list/?series=698872
  [2] MMSYS/MUTEX: https://patchwork.kernel.org/project/linux-mediatek/list/?series=684959
- Fix compilation failure due to use of undeclared identifier in file "mtk-mdp3-cmdq.c"

Hello,

This patch is used to add support for MDP3 on the MT8195 platform that
contains more picture quality components, and can arrange more pipelines
through two sets of MMSYS and MUTEX respectively.

Moudy Ho (13):
  dt-binding: mediatek: add bindings for MediaTek mt8195 MDP3 components
  arm64: dts: mediatek: mt8195: add MDP3 nodes
  media: platform: mtk-mdp3: add support second sets of MMSYS
  media: platform: mtk-mdp3: add support second sets of MUTEX
  media: platform: mtk-mdp3: introduce more MDP3 components
  media: platform: mtk-mdp3: add checks for dummy components
  media: platform: mtk-mdp3: avoid multiple driver registrations
  media: platform: mtk-mdp3: extend GCE event waiting in RDMA and WROT
  media: platform: mtk-mdp3: add the blend of component in MUTEX MOD
  media: platform: mtk-mdp3: add mt8195 platform configuration
  media: platform: mtk-mdp3: add mt8195 shared memory configurations
  media: platform: mtk-mdp3: add mt8195 MDP3 component settings
  media: platform: mtk-mdp3: add support for parallel pipe to improve
    FPS

 .../bindings/media/mediatek,mdp3-aal.yaml     |  63 ++
 .../bindings/media/mediatek,mdp3-color.yaml   |  63 ++
 .../bindings/media/mediatek,mdp3-fg.yaml      |  63 ++
 .../bindings/media/mediatek,mdp3-hdr.yaml     |  62 ++
 .../bindings/media/mediatek,mdp3-merge.yaml   |  63 ++
 .../bindings/media/mediatek,mdp3-ovl.yaml     |  63 ++
 .../bindings/media/mediatek,mdp3-pad.yaml     |  63 ++
 .../bindings/media/mediatek,mdp3-rdma.yaml    |  30 +-
 .../bindings/media/mediatek,mdp3-rsz.yaml     |  11 +-
 .../bindings/media/mediatek,mdp3-split.yaml   |  75 ++
 .../bindings/media/mediatek,mdp3-stitch.yaml  |  63 ++
 .../bindings/media/mediatek,mdp3-tcc.yaml     |  62 ++
 .../bindings/media/mediatek,mdp3-tdshp.yaml   |  63 ++
 arch/arm64/boot/dts/mediatek/mt8195.dtsi      | 420 +++++++++
 .../platform/mediatek/mdp3/mdp_reg_aal.h      |  25 +
 .../platform/mediatek/mdp3/mdp_reg_color.h    |  31 +
 .../media/platform/mediatek/mdp3/mdp_reg_fg.h |  23 +
 .../platform/mediatek/mdp3/mdp_reg_hdr.h      |  31 +
 .../platform/mediatek/mdp3/mdp_reg_merge.h    |  25 +
 .../platform/mediatek/mdp3/mdp_reg_ovl.h      |  25 +
 .../platform/mediatek/mdp3/mdp_reg_pad.h      |  21 +
 .../platform/mediatek/mdp3/mdp_reg_rdma.h     |  24 +
 .../platform/mediatek/mdp3/mdp_reg_rsz.h      |   2 +
 .../platform/mediatek/mdp3/mdp_reg_tdshp.h    |  34 +
 .../platform/mediatek/mdp3/mdp_reg_wrot.h     |   8 +
 .../mediatek/mdp3/mt8183/mdp3-plat-mt8183.h   |  38 +-
 .../mediatek/mdp3/mt8195/mdp3-comp-mt8195.h   | 283 ++++++
 .../mediatek/mdp3/mt8195/mdp3-plat-mt8195.h   | 669 ++++++++++++++
 .../platform/mediatek/mdp3/mtk-img-ipi.h      |   4 +
 .../platform/mediatek/mdp3/mtk-mdp3-cmdq.c    | 453 +++++++---
 .../platform/mediatek/mdp3/mtk-mdp3-cmdq.h    |   1 +
 .../platform/mediatek/mdp3/mtk-mdp3-comp.c    | 834 +++++++++++++++++-
 .../platform/mediatek/mdp3/mtk-mdp3-comp.h    |  92 +-
 .../platform/mediatek/mdp3/mtk-mdp3-core.c    | 115 ++-
 .../platform/mediatek/mdp3/mtk-mdp3-core.h    |  33 +-
 .../platform/mediatek/mdp3/mtk-mdp3-m2m.c     |  15 +
 .../platform/mediatek/mdp3/mtk-mdp3-regs.c    |  18 +
 .../platform/mediatek/mdp3/mtk-mdp3-regs.h    |   1 +
 .../platform/mediatek/mdp3/mtk-mdp3-vpu.c     |   3 +-
 39 files changed, 3791 insertions(+), 181 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-aal.yaml
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-color.yaml
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-fg.yaml
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-hdr.yaml
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-merge.yaml
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-ovl.yaml
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-pad.yaml
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-split.yaml
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-stitch.yaml
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tcc.yaml
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-tdshp.yaml
 create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_aal.h
 create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_color.h
 create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_fg.h
 create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_hdr.h
 create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_merge.h
 create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_ovl.h
 create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_pad.h
 create mode 100644 drivers/media/platform/mediatek/mdp3/mdp_reg_tdshp.h
 create mode 100644 drivers/media/platform/mediatek/mdp3/mt8195/mdp3-comp-mt8195.h
 create mode 100644 drivers/media/platform/mediatek/mdp3/mt8195/mdp3-plat-mt8195.h

Comments

Moudy Ho Jan. 18, 2023, 8:52 a.m. UTC | #1 
On Mon, 2023-01-16 at 09:10 +0100, Krzysztof Kozlowski wrote:
> On 16/01/2023 04:21, Moudy Ho wrote:

(snip)

> > +  mediatek,gce-client-reg:
> > +    description:
> > +      The register of client driver can be configured by gce with
> > 4 arguments
> > +      defined in this property, such as phandle of gce, subsys id,
> > +      register offset and size.
> > +      Each subsys id is mapping to a base address of display
> > function blocks
> > +      register which is defined in the gce header
> > +      include/dt-bindings/gce/<chip>-gce.h.
> > +    $ref: /schemas/types.yaml#/definitions/phandle-array
> > +    maxItems: 1
> 
> items with items syntax instead:
> 
> 
https://urldefense.com/v3/__https://elixir.bootlin.com/linux/v5.18-rc1/source/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml*L42__;Iw!!CTRNKA9wMg0ARbw!lcferrFFP-mshDHNL-rwJLgNKDrXF9fXoljpqL30k5YKTNvCwuC3webzR32VnQQoPeFvSvAewNkeupcT4mjdE_roxWUo$ 
>  
> 
> > +

(snip)

> > +
> > +  mediatek,gce-client-reg:
> > +    description:
> > +      The register of client driver can be configured by gce with
> > 4 arguments
> > +      defined in this property, such as phandle of gce, subsys id,
> > +      register offset and size.
> > +      Each subsys id is mapping to a base address of display
> > function blocks
> > +      register which is defined in the gce header
> > +      include/dt-bindings/gce/<chip>-gce.h.
> 
> Full, real path please, so it could be validated with tools.
> 
> 
> Best regards,
> Krzysztof
> 

Hi Krzysztof,

Sorry to bug you again about this property, could it be changed to
following form.

    mediatek,gce-client-reg:
      $ref: /schemas/types.yaml#/definitions/phandle-array
      items:
        items:
          - description: phandle of GCE
          - description: GCE subsys id
          - description: register offset
          - description: register size
      description:
        ... defined in <include/dt-bindings/gce/mt8195-gce.h>.
     maxItems: 1 
  
Also, is the include header path still necessary in this form?

Sincerely,
Moudy
Krzysztof Kozlowski Jan. 18, 2023, 12:47 p.m. UTC | #2 
On 18/01/2023 09:52, Moudy Ho (何宗原) wrote:
> On Mon, 2023-01-16 at 09:10 +0100, Krzysztof Kozlowski wrote:
>> On 16/01/2023 04:21, Moudy Ho wrote:
> 
> (snip)
> 
>>> +  mediatek,gce-client-reg:
>>> +    description:
>>> +      The register of client driver can be configured by gce with
>>> 4 arguments
>>> +      defined in this property, such as phandle of gce, subsys id,
>>> +      register offset and size.
>>> +      Each subsys id is mapping to a base address of display
>>> function blocks
>>> +      register which is defined in the gce header
>>> +      include/dt-bindings/gce/<chip>-gce.h.
>>> +    $ref: /schemas/types.yaml#/definitions/phandle-array
>>> +    maxItems: 1
>>
>> items with items syntax instead:
>>
>>
> https://urldefense.com/v3/__https://elixir.bootlin.com/linux/v5.18-rc1/source/Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml*L42__;Iw!!CTRNKA9wMg0ARbw!lcferrFFP-mshDHNL-rwJLgNKDrXF9fXoljpqL30k5YKTNvCwuC3webzR32VnQQoPeFvSvAewNkeupcT4mjdE_roxWUo$ 
>>  
>>
>>> +
> 
> (snip)
> 
>>> +
>>> +  mediatek,gce-client-reg:
>>> +    description:
>>> +      The register of client driver can be configured by gce with
>>> 4 arguments
>>> +      defined in this property, such as phandle of gce, subsys id,
>>> +      register offset and size.
>>> +      Each subsys id is mapping to a base address of display
>>> function blocks
>>> +      register which is defined in the gce header
>>> +      include/dt-bindings/gce/<chip>-gce.h.
>>
>> Full, real path please, so it could be validated with tools.
>>
>>
>> Best regards,
>> Krzysztof
>>
> 
> Hi Krzysztof,
> 
> Sorry to bug you again about this property, could it be changed to
> following form.
> 
>     mediatek,gce-client-reg:
>       $ref: /schemas/types.yaml#/definitions/phandle-array
>       items:
>         items:
>           - description: phandle of GCE
>           - description: GCE subsys id
>           - description: register offset
>           - description: register size
>       description:
>         ... defined in <include/dt-bindings/gce/mt8195-gce.h>.
>      maxItems: 1 
>   
> Also, is the include header path still necessary in this form?

No.

Best regards,
Krzysztof