diff mbox series

[v4,04/12] clk: imx7d: reset parent for mipi csi root

Message ID 20180517125033.18050-5-rui.silva@linaro.org
State Accepted
Commit b4f5e1ffcc47bf894bfb66294a6c0497ccd57aac
Headers show
Series media: staging/imx7: add i.MX7 media driver | expand

Commit Message

Rui Miguel Silva May 17, 2018, 12:50 p.m. UTC 
To guarantee that we do not get Overflow in image FIFO the outer bandwidth has
to be faster than inputer bandwidth. For that it must be possible to set a
faster frequency clock. So set new parent to sys_pfd3 clock for the mipi csi
block.

Cc: linux-clk@vger.kernel.org
Acked-by: Shawn Guo <shawnguo@kernel.org>

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>

---
 drivers/clk/imx/clk-imx7d.c | 2 ++
 1 file changed, 2 insertions(+)

-- 
2.17.0
diff mbox series

Patch

diff --git a/drivers/clk/imx/clk-imx7d.c b/drivers/clk/imx/clk-imx7d.c
index f7f4db2e6fa6..27877d05faa2 100644
--- a/drivers/clk/imx/clk-imx7d.c
+++ b/drivers/clk/imx/clk-imx7d.c
@@ -891,6 +891,8 @@  static void __init imx7d_clocks_init(struct device_node *ccm_node)
 	clk_set_parent(clks[IMX7D_PLL_AUDIO_MAIN_BYPASS], clks[IMX7D_PLL_AUDIO_MAIN]);
 	clk_set_parent(clks[IMX7D_PLL_VIDEO_MAIN_BYPASS], clks[IMX7D_PLL_VIDEO_MAIN]);
 
+	clk_set_parent(clks[IMX7D_MIPI_CSI_ROOT_SRC], clks[IMX7D_PLL_SYS_PFD3_CLK]);
+
 	/* use old gpt clk setting, gpt1 root clk must be twice as gpt counter freq */
 	clk_set_parent(clks[IMX7D_GPT1_ROOT_SRC], clks[IMX7D_OSC_24M_CLK]);