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[24.4.174.82]) by smtp.googlemail.com with ESMTPSA id z6sm10170179pgg.39.2020.04.06.00.30.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 00:30:37 -0700 (PDT) From: Karthik Poduval To: linux-media@vger.kernel.org Cc: Karthik Poduval Subject: [PATCH v2 3/3] ARM: dts: rockchip: add rk3288 ISP and DPHY Date: Mon, 6 Apr 2020 00:30:17 -0700 Message-Id: <20200406073017.19462-4-karthik.poduval@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200406073017.19462-1-karthik.poduval@gmail.com> References: <20200406073017.19462-1-karthik.poduval@gmail.com> Sender: linux-media-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org ISP and DPHY device entries missing so add them. tested on tinkerbaord with ov5647 using command cam -c 1 -C -F cap Reported-by: Karthik Poduval Signed-off-by: Karthik Poduval --- arch/arm/boot/dts/rk3288.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 9beb662166aa..adea8189abd9 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -247,6 +247,23 @@ ports = <&vopl_out>, <&vopb_out>; }; + isp: isp@ff910000 { + compatible = "rockchip,rk3288-rkisp1"; + reg = <0x0 0xff910000 0x0 0x4000>; + interrupts = ; + clocks = <&cru SCLK_ISP>, <&cru ACLK_ISP>, + <&cru HCLK_ISP>, <&cru PCLK_ISP_IN>, + <&cru SCLK_ISP_JPE>; + clock-names = "clk_isp", "aclk_isp", + "hclk_isp", "pclk_isp_in", + "sclk_isp_jpe"; + assigned-clocks = <&cru SCLK_ISP>, <&cru SCLK_ISP_JPE>; + assigned-clock-rates = <400000000>, <400000000>; + power-domains = <&power RK3288_PD_VIO>; + iommus = <&isp_mmu>; + status = "disabled"; + }; + sdmmc: mmc@ff0c0000 { compatible = "rockchip,rk3288-dw-mshc"; max-frequency = <150000000>; @@ -891,6 +908,14 @@ status = "disabled"; }; + mipi_phy_rx0: mipi-phy-rx0 { + compatible = "rockchip,rk3288-mipi-dphy-rx0"; + clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_CSI>; + clock-names = "dphy-ref", "pclk"; + #phy-cells = <0>; + status = "disabled"; + }; + io_domains: io-domains { compatible = "rockchip,rk3288-io-voltage-domain"; status = "disabled";