| Message ID | 20200904200112.5563-7-m.cerveny@computer.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [1/6] media: cedrus: Register all codecs as capability | expand |
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 3f18866fb..3fb01dc1a 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -195,6 +195,16 @@ }; }; + video-codec@1c0e000 { + compatible = "allwinner,sun8i-v3s-video-engine"; + reg = <0x01c0e000 0x1000>; + clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>, + <&ccu CLK_DRAM_VE>; + clock-names = "ahb", "mod", "ram"; + resets = <&ccu RST_BUS_VE>; + interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; + allwinner,sram = <&ve_sram 1>; + }; mmc0: mmc@1c0f000 { compatible = "allwinner,sun7i-a20-mmc";
Allwinner V3S SoC has a video engine. Add a node for it. Signed-off-by: Martin Cerveny <m.cerveny@computer.org> --- arch/arm/boot/dts/sun8i-v3s.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)