From patchwork Mon Feb 28 14:08:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 546891 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8CFD0C433FE for ; Mon, 28 Feb 2022 14:09:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237075AbiB1OJz (ORCPT ); Mon, 28 Feb 2022 09:09:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60856 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236977AbiB1OJg (ORCPT ); Mon, 28 Feb 2022 09:09:36 -0500 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D55FE7E0B3; Mon, 28 Feb 2022 06:08:56 -0800 (PST) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:82d4:230a:70ff:cde0]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 24A711F43A62; Mon, 28 Feb 2022 14:08:55 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1646057335; bh=HXQpbWWUDKlh55zh2JhcgQ4jNsekk9Ju05Ue5OAfA6s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ljj3YTRa/qB3afRDVsLZXw4BD3KhO4HODVPX9W/dw2P/nfBG4lB5xduqLFZJD5AYo Pay4WT8JVgwq9N9nD/BWWAtyk05jJrEVfvm/JexAVglbVisu8skpJF7aQBfUvN5AJl ArSJwQ/sO97lrCiSD+IhOw/XBM2SpOlyxiOvVAgcFmeK8vZdzM2czx3H7f0+9hToGu rJgDMUpo8tpAtGb8wGCCM7h14mbOy3YyhAO7kWENMhlYjslSd9q61BZVHDYzYjJ4fy rJd2DJDdoumhIbbkoOPIiUX98fD/Y3G5Ifhx5eKMit3iwXaUeu1E9UmF5BgnzM9A5J sVRd50LFubDnw== From: Benjamin Gaignard To: mchehab@kernel.org, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, jonas@kwiboo.se, nicolas@ndufresne.ca Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com, knaerzche@gmail.com, jc@kynesim.co.uk, Benjamin Gaignard Subject: [PATCH v4 14/15] media: uapi: Change data_bit_offset definition Date: Mon, 28 Feb 2022 15:08:37 +0100 Message-Id: <20220228140838.622021-15-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220228140838.622021-1-benjamin.gaignard@collabora.com> References: <20220228140838.622021-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org 'F.7.3.6.1 General slice segment header syntax' section of HEVC specification describes that a slice header always end byte aligned, therefore we only need to provide the data offset in byte. Signed-off-by: Benjamin Gaignard --- Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 4 ++-- drivers/staging/media/sunxi/cedrus/cedrus_h265.c | 2 +- include/media/hevc-ctrls.h | 4 ++-- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index 1aa2a7399e76..c8602c1e706e 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -2986,8 +2986,8 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - - ``bit_size`` - Size (in bits) of the current slice data. * - __u32 - - ``data_bit_offset`` - - Offset (in bits) to the video data in the current slice data. + - ``data_byte_offset`` + - Offset (in bytes) to the video data in the current slice data. * - __u32 - ``num_entry_point_offsets`` - Specifies the number of entry point offset syntax elements in the slice header. diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c index 8ab2d9c6f048..3e43b7cc2f57 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c @@ -405,7 +405,7 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx, /* Initialize bitstream access. */ cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC); - cedrus_h265_skip_bits(dev, slice_params->data_bit_offset); + cedrus_h265_skip_bits(dev, slice_params->data_byte_offset / 8); /* Bitstream parameters. */ diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h index c50205083573..51bdf38ea0c3 100644 --- a/include/media/hevc-ctrls.h +++ b/include/media/hevc-ctrls.h @@ -296,7 +296,7 @@ struct v4l2_hevc_pred_weight_table { * V4L2_CTRL_FLAG_DYNAMIC_ARRAY flag must be set when using it. * * @bit_size: size (in bits) of the current slice data - * @data_bit_offset: offset (in bits) to the video data in the current slice data + * @data_byte_offset: offset (in bytes) to the video data in the current slice data * @num_entry_point_offsets: specifies the number of entry point offset syntax * elements in the slice header. * @nal_unit_type: specifies the coding type of the slice (B, P or I) @@ -340,7 +340,7 @@ struct v4l2_hevc_pred_weight_table { */ struct v4l2_ctrl_hevc_slice_params { __u32 bit_size; - __u32 data_bit_offset; + __u32 data_byte_offset; __u32 num_entry_point_offsets; /* ISO/IEC 23008-2, ITU-T Rec. H.265: NAL unit header */ __u8 nal_unit_type;