From patchwork Fri Jul 8 12:05:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 588807 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 35834CCA480 for ; Fri, 8 Jul 2022 12:06:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238333AbiGHMG0 (ORCPT ); Fri, 8 Jul 2022 08:06:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60204 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238273AbiGHMGN (ORCPT ); Fri, 8 Jul 2022 08:06:13 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 112339B1AB; Fri, 8 Jul 2022 05:06:13 -0700 (PDT) Received: from benjamin-XPS-13-9310.. (unknown [IPv6:2a01:e0a:120:3210:3cab:61a1:2b1f:896b]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id 48DC366019ED; Fri, 8 Jul 2022 13:06:11 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1657281971; bh=BCrFtwmwew8PNj9oIBOiMYIYjxUWWFLXB3JoJRd0CEA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lDpfJkrdp3LdWXh5rl+hEuSo36oJk2PqaBCi/huY2auhV0wBeQWWn3Wktw0rHZGnf m3q0B735F4TGLLTN67QGviIG4fg1h/nP4PzGJ5GRfk9liwBLnFWswbs2llIZm12N0y /hu1+GBR9iGBSrEES/hRlhTYdoYPELjAy3cgBVJTyN6z76lriuNn7grAvETe0k2xD3 RS3Rag4VKHwRER8m7svz7UHCHEuXucHpkRAToCkI3G5RqGgc3Xyn5swSxgPAVmYLEQ bMOJbrD/i367+tICBI/tfDhvhgRcC2pbAOBB75qgbIw0lKUjQuB+jpYg0kW7Mv28+a +yTheoceYzk/g== From: Benjamin Gaignard To: mchehab@kernel.org, hverkuil@xs4all.nl, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, nicolas.dufresne@collabora.com, andrzej.p@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com, Benjamin Gaignard Subject: [PATCH v12 09/17] media: uapi: HEVC: Define V4L2_CID_STATELESS_HEVC_SLICE_PARAMS as a dynamic array Date: Fri, 8 Jul 2022 14:05:46 +0200 Message-Id: <20220708120554.495495-10-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220708120554.495495-1-benjamin.gaignard@collabora.com> References: <20220708120554.495495-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-media@vger.kernel.org Make explicit that V4L2_CID_STATELESS_HEVC_SLICE_PARAMS control is a dynamic array control type. Some drivers may be able to receive multiple slices in one control to improve decoding performance. Signed-off-by: Benjamin Gaignard --- Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst | 2 ++ drivers/media/v4l2-core/v4l2-ctrls-defs.c | 1 + drivers/staging/media/sunxi/cedrus/cedrus.c | 2 ++ include/media/hevc-ctrls.h | 3 +++ 4 files changed, 8 insertions(+) diff --git a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst index e88b5e6944a6..c2e0adece613 100644 --- a/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst +++ b/Documentation/userspace-api/media/v4l/ext-ctrls-codec.rst @@ -2986,6 +2986,8 @@ enum v4l2_mpeg_video_hevc_size_of_length_field - These bitstream parameters are defined according to :ref:`hevc`. They are described in section 7.4.7 "General slice segment header semantics" of the specification. + This control is a dynamically sized 1-dimensional array, + V4L2_CTRL_FLAG_DYNAMIC_ARRAY flag must be set when using it. .. c:type:: v4l2_ctrl_hevc_slice_params diff --git a/drivers/media/v4l2-core/v4l2-ctrls-defs.c b/drivers/media/v4l2-core/v4l2-ctrls-defs.c index 9f55503cd3d6..d594efbcbb93 100644 --- a/drivers/media/v4l2-core/v4l2-ctrls-defs.c +++ b/drivers/media/v4l2-core/v4l2-ctrls-defs.c @@ -1510,6 +1510,7 @@ void v4l2_ctrl_fill(u32 id, const char **name, enum v4l2_ctrl_type *type, break; case V4L2_CID_STATELESS_HEVC_SLICE_PARAMS: *type = V4L2_CTRL_TYPE_HEVC_SLICE_PARAMS; + *flags |= V4L2_CTRL_FLAG_DYNAMIC_ARRAY; break; case V4L2_CID_STATELESS_HEVC_SCALING_MATRIX: *type = V4L2_CTRL_TYPE_HEVC_SCALING_MATRIX; diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c index 87be975a72b6..b12219123a6b 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c @@ -178,6 +178,8 @@ static const struct cedrus_control cedrus_controls[] = { { .cfg = { .id = V4L2_CID_STATELESS_HEVC_SLICE_PARAMS, + /* The driver can only handle 1 entry per slice for now */ + .dims = { 1 }, }, .codec = CEDRUS_CODEC_H265, }, diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h index 57053cfa099b..341fc795d550 100644 --- a/include/media/hevc-ctrls.h +++ b/include/media/hevc-ctrls.h @@ -314,6 +314,9 @@ struct v4l2_hevc_pred_weight_table { /** * struct v4l2_ctrl_hevc_slice_params - HEVC slice parameters * + * This control is a dynamically sized 1-dimensional array, + * V4L2_CTRL_FLAG_DYNAMIC_ARRAY flag must be set when using it. + * * @bit_size: size (in bits) of the current slice data * @data_bit_offset: offset (in bits) to the video data in the current slice data * @nal_unit_type: specifies the coding type of the slice (B, P or I)