diff mbox series

[1/2] media: dt-bindings: mediatek: Add phandle to mediatek,scp on MDP3 RDMA

Message ID 20230919095938.70679-2-angelogioacchino.delregno@collabora.com
State New
Headers show
Series MediaTek MDP3: use devicetree to retrieve SCP | expand

Commit Message

AngeloGioacchino Del Regno Sept. 19, 2023, 9:59 a.m. UTC
The MDP3 RDMA needs to communicate with the SCP remote processor: allow
specifying a phandle to a SCP core.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 .../devicetree/bindings/media/mediatek,mdp3-rdma.yaml       | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Chen-Yu Tsai Sept. 19, 2023, 10:28 a.m. UTC | #1
On Tue, Sep 19, 2023 at 5:59 PM AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com> wrote:
>
> The MDP3 RDMA needs to communicate with the SCP remote processor: allow
> specifying a phandle to a SCP core.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

> ---
>  .../devicetree/bindings/media/mediatek,mdp3-rdma.yaml       | 6 ++++++
>  1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
> index d639a1461143..0e5ce2e77e99 100644
> --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
> +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
> @@ -46,6 +46,11 @@ properties:
>        include/dt-bindings/gce/<chip>-gce.h of each chips.
>      $ref: /schemas/types.yaml#/definitions/uint32-array
>
> +  mediatek,scp:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      Phandle to the System Control Processor (SCP) node
> +
>    power-domains:
>      oneOf:
>        - items:
> @@ -98,6 +103,7 @@ examples:
>          mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
>          mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>,
>                                <CMDQ_EVENT_MDP_RDMA0_EOF>;
> +        mediatek,scp = <&scp>;
>          power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
>          clocks = <&mmsys CLK_MM_MDP_RDMA0>,
>                   <&mmsys CLK_MM_MDP_RSZ1>;
> --
> 2.42.0
>
Conor Dooley Sept. 19, 2023, 10:57 a.m. UTC | #2
On Tue, Sep 19, 2023 at 11:59:37AM +0200, AngeloGioacchino Del Regno wrote:
> The MDP3 RDMA needs to communicate with the SCP remote processor: allow
> specifying a phandle to a SCP core.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

Thanks,
Conor.
Krzysztof Kozlowski Sept. 23, 2023, 5:38 p.m. UTC | #3
On 19/09/2023 11:59, AngeloGioacchino Del Regno wrote:
> The MDP3 RDMA needs to communicate with the SCP remote processor: allow
> specifying a phandle to a SCP core.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
>  .../devicetree/bindings/media/mediatek,mdp3-rdma.yaml       | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
> index d639a1461143..0e5ce2e77e99 100644
> --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
> +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
> @@ -46,6 +46,11 @@ properties:
>        include/dt-bindings/gce/<chip>-gce.h of each chips.
>      $ref: /schemas/types.yaml#/definitions/uint32-array
>  
> +  mediatek,scp:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      Phandle to the System Control Processor (SCP) node

Why? Why do you need it? For what do you add here phandle? Your
description should explain the purpose.

Best regards,
Krzysztof
AngeloGioacchino Del Regno Oct. 2, 2023, 11:17 a.m. UTC | #4
Il 23/09/23 19:38, Krzysztof Kozlowski ha scritto:
> On 19/09/2023 11:59, AngeloGioacchino Del Regno wrote:
>> The MDP3 RDMA needs to communicate with the SCP remote processor: allow
>> specifying a phandle to a SCP core.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
>> ---
>>   .../devicetree/bindings/media/mediatek,mdp3-rdma.yaml       | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
>> index d639a1461143..0e5ce2e77e99 100644
>> --- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
>> +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
>> @@ -46,6 +46,11 @@ properties:
>>         include/dt-bindings/gce/<chip>-gce.h of each chips.
>>       $ref: /schemas/types.yaml#/definitions/uint32-array
>>   
>> +  mediatek,scp:
>> +    $ref: /schemas/types.yaml#/definitions/phandle
>> +    description:
>> +      Phandle to the System Control Processor (SCP) node
> 
> Why? Why do you need it? For what do you add here phandle? Your
> description should explain the purpose.
> 

Sorry for the slow reply, just seen your feedback, thanks!
I'll add a nicer description for v2.

Cheers,
Angelo
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
index d639a1461143..0e5ce2e77e99 100644
--- a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
+++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
@@ -46,6 +46,11 @@  properties:
       include/dt-bindings/gce/<chip>-gce.h of each chips.
     $ref: /schemas/types.yaml#/definitions/uint32-array
 
+  mediatek,scp:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      Phandle to the System Control Processor (SCP) node
+
   power-domains:
     oneOf:
       - items:
@@ -98,6 +103,7 @@  examples:
         mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
         mediatek,gce-events = <CMDQ_EVENT_MDP_RDMA0_SOF>,
                               <CMDQ_EVENT_MDP_RDMA0_EOF>;
+        mediatek,scp = <&scp>;
         power-domains = <&spm MT8183_POWER_DOMAIN_DISP>;
         clocks = <&mmsys CLK_MM_MDP_RDMA0>,
                  <&mmsys CLK_MM_MDP_RSZ1>;