diff mbox series

[v3,3/6] arm64: dts: mediatek: mt8192: fix vencoder clock name

Message ID 20231228113245.174706-4-eugen.hristev@collabora.com
State Accepted
Commit 76aac0f2a46847ed4a7a4fdd848dd66023c19ad1
Headers show
Series video encoder on mt8186 | expand

Commit Message

Eugen Hristev Dec. 28, 2023, 11:32 a.m. UTC
Clock name should be `venc_sel` as per binding.
Fix the warning message :
arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dtb: vcodec@17020000: clock-names:0: 'venc_sel' was expected
        from schema $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml#

Fixes: aa8f3711fc87 ("arm64: dts: mt8192: Add H264 venc device node")
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
---
Changes in v3:
none
Changes in v2:
- new patch.
 arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

AngeloGioacchino Del Regno Jan. 2, 2024, 9:13 a.m. UTC | #1
Il 28/12/23 12:32, Eugen Hristev ha scritto:
> Clock name should be `venc_sel` as per binding.
> Fix the warning message :
> arch/arm64/boot/dts/mediatek/mt8192-asurada-hayato-r1.dtb: vcodec@17020000: clock-names:0: 'venc_sel' was expected
>          from schema $id: http://devicetree.org/schemas/media/mediatek,vcodec-encoder.yaml#
> 
> Fixes: aa8f3711fc87 ("arm64: dts: mt8192: Add H264 venc device node")
> Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 69f4cded5dbb..f1fc14e53f8c 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -1770,7 +1770,7 @@  vcodec_enc: vcodec@17020000 {
 			mediatek,scp = <&scp>;
 			power-domains = <&spm MT8192_POWER_DOMAIN_VENC>;
 			clocks = <&vencsys CLK_VENC_SET1_VENC>;
-			clock-names = "venc-set1";
+			clock-names = "venc_sel";
 			assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
 			assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
 		};