diff --git a/MAINTAINERS b/MAINTAINERS
index 27fb3c1be732..bf6a48da0887 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -21890,6 +21890,7 @@ M:      Stuart Burtner <sburtner@d3embedded.com>
 L:     linux-media@vger.kernel.org
 S:     Odd Fixes
 F:     Documentation/devicetree/bindings/media/i2c/sony,imx728.yaml
+F:     arch/arm64/boot/dts/ti/k3-am62a7-sk-fusion-2.dtso
 F:     drivers/media/i2c/imx728.c

 SONY MEMORYSTICK SUBSYSTEM
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile
index f71360f14f23..fcd8d11e5678 100644
--- a/arch/arm64/boot/dts/ti/Makefile
+++ b/arch/arm64/boot/dts/ti/Makefile
@@ -31,6 +31,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk-nand.dtbo
 # Boards with AM62Ax SoC
 dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk.dtb
 dtb-$(CONFIG_ARCH_K3) += k3-am62a7-phyboard-lyra-rdk.dtb
+dtb-$(CONFIG_ARCH_K3) += k3-am62a7-sk-fusion-2.dtbo

 # Boards with AM62Px SoC
 dtb-$(CONFIG_ARCH_K3) += k3-am62p5-sk.dtb
diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk-fusion-2.dtso b/arch/arm64/boot/dts/ti/k3-am62a7-sk-fusion-2.dtso
new file mode 100644
index 000000000000..68e06d643bfd
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk-fusion-2.dtso
@@ -0,0 +1,115 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * DT Overlay for Fusion 2 (FPD-Link IV) board on SK-AM62A
+ * https://www.ti.com/tool/J7EXPAXEVM/
+ *
+ * Copyright (C) 2024 D3 Embedded - https://www.d3embedded.com
+ */
+
+ /dts-v1/;
+ /plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+
+&{/} {
+       clk_fusion2_25M_fixed: fixed-clock-25M {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <25000000>;
+       };
+};
+
+&exp2 {
+       p9-hog {
+               /* P9 - CSI_RSTz */
+               gpio-hog;
+               gpios = <9 GPIO_ACTIVE_HIGH>;
+               output-high;
+               line-name = "CSI_RSTz";
+       };
+
+       p19-hog {
+               /* P19 -CSI_SEL2 */
+               gpio-hog;
+               gpios = <19 GPIO_ACTIVE_HIGH>;
+               output-low;
+               line-name = "CSI_SEL2";
+       };
+};
+
+&main_i2c2 {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       status = "okay";
+
+       i2c-switch@71 {
+               compatible = "nxp,pca9543";
+               #address-cells = <1>;
+               #size-cells = <0>;
+               reg = <0x71>;
+
+               i2c@1 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <1>;
+
+                       deser@3d {
+                               compatible = "ti,ds90ub9702-q1";
+                               reg = <0x3d>;
+
+                               clock-names = "refclk";
+                               clocks = <&clk_fusion2_25M_fixed>;
+
+                               i2c-alias-pool = <0x4a 0x4b 0x4c 0x4d 0x4e 0x4f>;
+
+                               ds90ub9702_0_ports: ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       /* CSI-2 TX */
+                                       port@4 {
+                                               reg = <4>;
+                                               ds90ub9702_0_csi_out: endpoint {
+                                                       data-lanes = <1 2 3 4>;
+                                                       clock-lanes = <0>;
+                                                       link-frequencies = /bits/ 64 <800000000>;
+                                                       remote-endpoint = <&csi2_phy0>;
+                                               };
+                                       };
+                               };
+
+                               ds90ub9702_0_links: links {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                               };
+                       };
+               };
+       };
+};
+
+&cdns_csi2rx0 {
+       ports {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               csi0_port0: port@0 {
+                       reg = <0>;
+                       status = "okay";
+
+                       csi2_phy0: endpoint {
+                               remote-endpoint = <&ds90ub9702_0_csi_out>;
+                               data-lanes = <1 2 3 4>;
+                               clock-lanes = <0>;
+                               link-frequencies = /bits/ 64 <800000000>;
+                       };
+               };
+       };
+};
+
+&ti_csi2rx0 {
+       status = "okay";
+};
+
+&dphy0 {
+       status = "okay";
+};
