From patchwork Tue Apr 29 08:21:14 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinivas Kandagatla X-Patchwork-Id: 29313 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-ve0-f200.google.com (mail-ve0-f200.google.com [209.85.128.200]) by ip-10-151-82-157.ec2.internal (Postfix) with ESMTPS id A9BB1202FE for ; Tue, 29 Apr 2014 08:21:37 +0000 (UTC) Received: by mail-ve0-f200.google.com with SMTP id oy12sf31156919veb.11 for ; Tue, 29 Apr 2014 01:21:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=6H6sjnSckNKxIo6mUwhITUmXqOeJa/4gz5OPuZXVF3Q=; b=axRUKjCH6aK6Xckstm/zZfRsEURnd59zebfVv5Q5C3DjRrFg5ZEoqiJ2QyTk3l9yag TuXiLfG3ERiv+FZoCVU0A5FonoRdln02/v8LrJ+ZZ3yX7udwKlIsin/1RkgnvIu8dyhs pmI6Vd1RRvWEs0x5qCIyVk2ABc6Qt9E85k7fLgMG6RTR0xblzWnmSKCGt086JErzMqCY ijdo9W1y582ZUxk8zHzYOeqEHkgvKm/gX/bR7w1BdA3NvVUAwVMVlZBRjAo98jL75Va+ /yoAJh9qBmfNWxcp2CMG7rzQXpsM6ZcBJJT5CNQHzsy8rZ/aa7xirPO+IsiwIvCNJUpP y2PQ== X-Gm-Message-State: ALoCoQnzA2n5X6vSBL77GisC0VMHydJtJNiDJqEGx3n49K+1jv0126zFm0T0F+YpOmrokbTK4qc9 X-Received: by 10.236.94.238 with SMTP id n74mr11579780yhf.27.1398759697422; Tue, 29 Apr 2014 01:21:37 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.140.23.232 with SMTP id 95ls3117882qgp.68.gmail; Tue, 29 Apr 2014 01:21:37 -0700 (PDT) X-Received: by 10.52.123.39 with SMTP id lx7mr24232404vdb.22.1398759697265; Tue, 29 Apr 2014 01:21:37 -0700 (PDT) Received: from mail-ve0-f179.google.com (mail-ve0-f179.google.com [209.85.128.179]) by mx.google.com with ESMTPS id rw10si4341515vec.134.2014.04.29.01.21.37 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 29 Apr 2014 01:21:37 -0700 (PDT) Received-SPF: none (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) client-ip=209.85.128.179; Received: by mail-ve0-f179.google.com with SMTP id db12so9659453veb.10 for ; Tue, 29 Apr 2014 01:21:37 -0700 (PDT) X-Received: by 10.52.128.231 with SMTP id nr7mr24228912vdb.17.1398759697179; Tue, 29 Apr 2014 01:21:37 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.220.221.72 with SMTP id ib8csp178216vcb; Tue, 29 Apr 2014 01:21:36 -0700 (PDT) X-Received: by 10.68.226.35 with SMTP id rp3mr31173972pbc.73.1398759696412; Tue, 29 Apr 2014 01:21:36 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id tv5si12145057pbc.373.2014.04.29.01.21.35 for ; Tue, 29 Apr 2014 01:21:35 -0700 (PDT) Received-SPF: none (google.com: linux-kernel-owner@vger.kernel.org does not designate permitted sender hosts) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933023AbaD2IV2 (ORCPT + 28 others); Tue, 29 Apr 2014 04:21:28 -0400 Received: from mail-we0-f169.google.com ([74.125.82.169]:56518 "EHLO mail-we0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932956AbaD2IVV (ORCPT ); Tue, 29 Apr 2014 04:21:21 -0400 Received: by mail-we0-f169.google.com with SMTP id u56so633111wes.14 for ; Tue, 29 Apr 2014 01:21:21 -0700 (PDT) X-Received: by 10.180.218.2 with SMTP id pc2mr19254827wic.19.1398759680935; Tue, 29 Apr 2014 01:21:20 -0700 (PDT) Received: from srinivas-Inspiron-N5050.dlink.com (host-78-147-6-229.as13285.net. [78.147.6.229]) by mx.google.com with ESMTPSA id fo10sm831103wib.12.2014.04.29.01.21.19 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 29 Apr 2014 01:21:20 -0700 (PDT) From: srinivas.kandagatla@linaro.org To: Russell King , linux-mmc@vger.kernel.org Cc: Chris Ball , Ulf Hansson , linux-kernel@vger.kernel.org, agross@quicinc.com, linux-arm-msm@vger.kernel.org, Srinivas Kandagatla Subject: [PATCH v1 11/11] mmc: mmci: Add Qcom specific pio_read function. Date: Tue, 29 Apr 2014 09:21:14 +0100 Message-Id: <1398759674-13421-1-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1398759492-12970-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1398759492-12970-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: srinivas.kandagatla@linaro.org X-Original-Authentication-Results: mx.google.com; spf=neutral (google.com: patch+caf_=patchwork-forward=linaro.org@linaro.org does not designate permitted sender hosts) smtp.mail=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Srinivas Kandagatla MCIFIFOCNT register behaviour on Qcom chips is very different than the other pl180 integrations. MCIFIFOCNT register contains the number of words that are still waiting to be transferred through the FIFO. It keeps decrementing once the host CPU reads the MCIFIFO. With the existing logic and the MCIFIFOCNT behaviour, mmci_pio_read will loop forever, as the FIFOCNT register will always return transfer size before reading the FIFO. Also the data sheet states that "This register is only useful for debug purposes and should not be used for normal operation since it does not reflect data which may or may not be in the pipeline". This patch implements qcom_pio_read function so as existing mmci_pio_read is not suitable for Qcom SOCs. Signed-off-by: Srinivas Kandagatla --- drivers/mmc/host/mmci.c | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index def1b19..45198b6 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -1038,6 +1038,29 @@ mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, } } +static int mmci_qcom_pio_read(struct mmci_host *host, char *buffer, + unsigned int remain) +{ + uint32_t *ptr = (uint32_t *) buffer; + int count = 0; + struct variant_data *variant = host->variant; + int fifo_size = variant->fifosize; + + if (remain % 4) + remain = ((remain >> 2) + 1) << 2; + + while (readl(host->base + MMCISTATUS) & MCI_RXDATAAVLBL) { + *ptr = readl(host->base + MMCIFIFO + (count % fifo_size)); + ptr++; + count += sizeof(uint32_t); + + remain -= sizeof(uint32_t); + if (remain == 0) + break; + } + return count; +} + static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain) { void __iomem *base = host->base; @@ -1159,8 +1182,12 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id) remain = sg_miter->length; len = 0; - if (status & MCI_RXACTIVE) - len = mmci_pio_read(host, buffer, remain); + if (status & MCI_RXACTIVE) { + if (host->hw_designer == AMBA_VENDOR_QCOM) + len = mmci_qcom_pio_read(host, buffer, remain); + else + len = mmci_pio_read(host, buffer, remain); + } if (status & MCI_TXACTIVE) len = mmci_pio_write(host, buffer, remain, status);