From patchwork Fri Sep 4 15:32:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vaibhav Hiremath X-Patchwork-Id: 53128 Return-Path: X-Original-To: linaro@patches.linaro.org Delivered-To: linaro@patches.linaro.org Received: from mail-wi0-f197.google.com (mail-wi0-f197.google.com [209.85.212.197]) by patches.linaro.org (Postfix) with ESMTPS id 6D87E23013 for ; Fri, 4 Sep 2015 15:35:30 +0000 (UTC) Received: by wicmn1 with SMTP id mn1sf7606678wic.1 for ; Fri, 04 Sep 2015 08:35:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:delivered-to:from:to:cc:subject :date:message-id:in-reply-to:references:sender:precedence:list-id :x-original-sender:x-original-authentication-results:mailing-list :list-post:list-help:list-archive:list-unsubscribe; bh=8kjjvubOO8mjFfCwVOyGvodH1RXl8Uxr6SKx8ksY3a0=; b=Ncx6cBDFmCLUbXTzagtgd1oCbj5dXf/Q3VVAnuMBI6tsWJgfDRzCkkHqVilWQ8Z4Pe or1tZBPLAJRvGsuo3sZk4yVhDf6uoh6O5aRHRW+GAohas1cYAxopJF+Viny1gSM9g5kV gvYC4MND7XZdLrlVVrl28GCkNGkALEwP4VM4TQiketnOh93VcSapVCLB9cISpwMbdEfC udqNE3fhgMNgIzZmEAZR4qLtD4VH/Q4Z914JL/a130jTPTGTyIdJTZ+XL06p/zqqra8t SDjzS9IAIHSkc+07AMWgR8ahgl3O7iqwa+ukAHu3wCmegxC930qpdgbajlEP8xaPfUYA DzmQ== X-Gm-Message-State: ALoCoQkH87sypHMajePFa9fS/2SP2qyIatkPjI+4CImKgMdzx07yHLipfDuklqIzhYT9FBZjmMkE X-Received: by 10.112.139.137 with SMTP id qy9mr1173855lbb.17.1441380929749; Fri, 04 Sep 2015 08:35:29 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: patchwork-forward@linaro.org Received: by 10.152.9.7 with SMTP id v7ls359012laa.107.gmail; Fri, 04 Sep 2015 08:35:29 -0700 (PDT) X-Received: by 10.152.43.198 with SMTP id y6mr4114849lal.41.1441380929538; Fri, 04 Sep 2015 08:35:29 -0700 (PDT) Received: from mail-la0-f42.google.com (mail-la0-f42.google.com. [209.85.215.42]) by mx.google.com with ESMTPS id uj8si2622599lbb.22.2015.09.04.08.35.29 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 04 Sep 2015 08:35:29 -0700 (PDT) Received-SPF: pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.42 as permitted sender) client-ip=209.85.215.42; Received: by lagj9 with SMTP id j9so16228945lag.2 for ; Fri, 04 Sep 2015 08:35:29 -0700 (PDT) X-Received: by 10.112.131.98 with SMTP id ol2mr4348001lbb.56.1441380929441; Fri, 04 Sep 2015 08:35:29 -0700 (PDT) X-Forwarded-To: patchwork-forward@linaro.org X-Forwarded-For: patch@linaro.org patchwork-forward@linaro.org Delivered-To: patch@linaro.org Received: by 10.112.164.42 with SMTP id yn10csp2065951lbb; Fri, 4 Sep 2015 08:35:28 -0700 (PDT) X-Received: by 10.50.117.9 with SMTP id ka9mr8690921igb.8.1441380928194; Fri, 04 Sep 2015 08:35:28 -0700 (PDT) Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id fz12si4884980pdb.140.2015.09.04.08.35.27; Fri, 04 Sep 2015 08:35:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932849AbbIDPfE (ORCPT + 2 others); Fri, 4 Sep 2015 11:35:04 -0400 Received: from mail-pa0-f51.google.com ([209.85.220.51]:36614 "EHLO mail-pa0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932893AbbIDPfC (ORCPT ); Fri, 4 Sep 2015 11:35:02 -0400 Received: by pacwi10 with SMTP id wi10so27517962pac.3 for ; Fri, 04 Sep 2015 08:35:01 -0700 (PDT) X-Received: by 10.66.90.166 with SMTP id bx6mr9283420pab.133.1441380901755; Fri, 04 Sep 2015 08:35:01 -0700 (PDT) Received: from localhost.localdomain ([202.62.93.137]) by smtp.gmail.com with ESMTPSA id gs2sm2920151pbc.15.2015.09.04.08.34.58 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 04 Sep 2015 08:35:00 -0700 (PDT) From: Vaibhav Hiremath To: linux-mmc@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kliu5@marvell.com, ulf.hansson@linaro.org, Vaibhav Hiremath Subject: [PATCH 5/5] mmc: sdhci: add new quirk for setting BUS_POWER & BUS_VLT fields Date: Fri, 4 Sep 2015 21:02:21 +0530 Message-Id: <1441380741-13115-6-git-send-email-vaibhav.hiremath@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1441380741-13115-1-git-send-email-vaibhav.hiremath@linaro.org> References: <1441380741-13115-1-git-send-email-vaibhav.hiremath@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: list List-ID: X-Mailing-List: linux-mmc@vger.kernel.org X-Removed-Original-Auth: Dkim didn't pass. X-Original-Sender: vaibhav.hiremath@linaro.org X-Original-Authentication-Results: mx.google.com; spf=pass (google.com: domain of patch+caf_=patchwork-forward=linaro.org@linaro.org designates 209.85.215.42 as permitted sender) smtp.mailfrom=patch+caf_=patchwork-forward=linaro.org@linaro.org Mailing-list: list patchwork-forward@linaro.org; contact patchwork-forward+owners@linaro.org X-Google-Group-Id: 836684582541 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , IN case of Marvell 1928 family of devices, the SD_BUS_POWER and SD_BUS_VLT bits are used internally to gate the clocks, so we have to set these fields. Pasting Spec words here, The and fields should be configured to correct values. These actually do not do the voltage selection or switch power to the SD card. However these fields are used internally to gate the clock. So if these fields are set incorrectly, SD module will not function. And during my development, I have seen that SD card wouldn't function without right configuration into these fields. So this patch adds new quirk (SDHCI_QUIRK2_MUST_SET_SDHCI_BUS_POWER), which make sure that ->set_power() sets these fields. Signed-off-by: Vaibhav Hiremath --- drivers/mmc/host/sdhci-pltfm.c | 3 +++ drivers/mmc/host/sdhci.c | 3 ++- drivers/mmc/host/sdhci.h | 2 ++ 3 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index a207f5a..0872da0 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c @@ -101,6 +101,9 @@ void sdhci_get_of_property(struct platform_device *pdev) of_device_is_compatible(np, "fsl,mpc8536-esdhc")) host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; + if (of_device_is_compatible(np, "marvell,pxav3-988-sdhci")) + host->quirks2 |= SDHCI_QUIRK2_MUST_SET_SDHCI_BUS_POWER; + clk = of_get_property(np, "clock-frequency", &size); if (clk && size == sizeof(*clk) && *clk) pltfm_host->clock = be32_to_cpup(clk); diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 2d58b31..418f381 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -1265,7 +1265,8 @@ static void sdhci_set_power(struct sdhci_host *host, unsigned char mode, else sdhci_writeb(host, 0, SDHCI_POWER_CONTROL); - return; + if (!(host->quirks2 | SDHCI_QUIRK2_MUST_SET_SDHCI_BUS_POWER)) + return; } if (mode != MMC_POWER_OFF) { diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 9b0e2a8..8802a0c 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -409,6 +409,8 @@ struct sdhci_host { #define SDHCI_QUIRK2_SUPPORT_SINGLE (1<<13) /* Controller broken with using ACMD23 */ #define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14) +/* Voltage capabilities of Controller must be set */ +#define SDHCI_QUIRK2_MUST_SET_SDHCI_BUS_POWER (1<<15) int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */