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[209.132.180.67]) by mx.google.com with ESMTP id g8-v6si41835842plt.434.2018.11.04.19.17.11; Sun, 04 Nov 2018 19:17:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i+Yf8mAQ; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727094AbeKEMec (ORCPT + 5 others); Mon, 5 Nov 2018 07:34:32 -0500 Received: from mail-pg1-f193.google.com ([209.85.215.193]:38288 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728003AbeKEMeb (ORCPT ); Mon, 5 Nov 2018 07:34:31 -0500 Received: by mail-pg1-f193.google.com with SMTP id f8-v6so3537314pgq.5 for ; Sun, 04 Nov 2018 19:17:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/RyO1nhh4B8uT0hCEIyo5VG0Vz6UKIjRdhaBpX6QFyI=; b=i+Yf8mAQp2Xn6tGSU0Dgbwzd8052cMRAew3IUR/N8ygKcBHARtUgIoeIluN/kjWIP/ mKLr5tVZsVqKQ5bQcAjdcGtdXvJFXebRP6Potr1RQ2SpNEbBTfuy+tyWjhwBaKPIEf1N fyfcXuwtjUu1gSdxwmAFGsHDSCrBi2BmyOie4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/RyO1nhh4B8uT0hCEIyo5VG0Vz6UKIjRdhaBpX6QFyI=; b=HspM4tWbZYdBPuPYjN1dI3dPrOXAgeqPWR8M0iQc1nNTSfNnFa5bIv6xTGkvif4B4T QmFKOslDNV/aCKe1KHMs0B9m6+w+wNpWqHUQY2qy8wop7Vl0Zk2t7Qx6mrYasfEvv10j 2GsDA8ObUj8fSaB2/CM9m0KlR9N8zxbiXj9dzyS2OAT2NXH5LmTYzzmrU1iJ/CI2rSH0 3cRdFCEKZXKs9JRYJSCfLfD4r8xarfA6GBiR9LJX1waEbp0ziBR2xVfh3KmJgzB8FIZC RVU+zxw3zdFBMmeUKRx3taMlPbnuAWAHyTF+bz+MSOFuCKcKD5p2k/+6EWeitaFOyMFX Hg4A== X-Gm-Message-State: AGRZ1gJE5ylpv4SdnpCdvgv5oL+oh2OGth5gyNAsUegqgpXTLRZ83Sov AXvs+6vjcO96S5JLhITB/L6eEw== X-Received: by 2002:a63:2109:: with SMTP id h9mr18724326pgh.277.1541387823026; Sun, 04 Nov 2018 19:17:03 -0800 (PST) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id f10-v6sm40182773pgp.72.2018.11.04.19.16.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 04 Nov 2018 19:17:02 -0800 (PST) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Mark Brown , Kishon Vijay Abraham I , Sekhar Nori , Chunyan Zhang Subject: [PATCH RFC 1/3] mmc: sdhci: add support for using external DMA devices Date: Mon, 5 Nov 2018 11:16:48 +0800 Message-Id: <1541387810-24867-2-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1541387810-24867-1-git-send-email-zhang.chunyan@linaro.org> References: <1541387810-24867-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Some standard SD host controller can support both external dma controllers as well as ADMA in which the controller acts as DMA master. Currently the generic SDHCI code supports ADMA/SDMA integrated into the host controller but does not have any support for external DMA controllers implemented using dmaengine meaning that custom code is needed for any systems that use a generic DMA controller with SDHCI. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/Kconfig | 13 +++++ drivers/mmc/host/sdhci.c | 137 ++++++++++++++++++++++++++++++++++++++++++++++- drivers/mmc/host/sdhci.h | 12 +++++ 3 files changed, 161 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 1b58739..c4745d8 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -977,3 +977,16 @@ config MMC_SDHCI_OMAP If you have a controller with this interface, say Y or M here. If unsure, say N. + +config MMC_SDHCI_EXTDMA + bool "Support external DMA in standard SD host controller" + depends on MMC_SDHCI + depends on DMA_ENGINE + help + This is an option for using external DMA device via dmaengine + framework. + + If you have a controller which supports using external DMA device + for data transfer, can say Y. + + If unsure, say N. diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 99bdae5..ffb1d2b 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include @@ -1309,6 +1310,128 @@ static void sdhci_del_timer(struct sdhci_host *host, struct mmc_request *mrq) del_timer(&host->timer); } +#if IS_ENABLED(CONFIG_MMC_SDHCI_EXTDMA) +static int sdhci_extdma_init_chan(struct sdhci_host *host) +{ + int ret = 0; + struct mmc_host *mmc = host->mmc; + struct sdhci_extdma *dma = &host->extdma; + + dma->tx_chan = dma_request_chan(mmc->parent, "tx"); + if (IS_ERR(dma->tx_chan)) { + ret = PTR_ERR(dma->tx_chan); + dma->tx_chan = NULL; + pr_warn("Failed to request TX DMA channel.\n"); + return ret; + } + + dma->rx_chan = dma_request_chan(mmc->parent, "rx"); + if (IS_ERR(dma->rx_chan)) { + ret = PTR_ERR(dma->rx_chan); + if (ret == -EPROBE_DEFER && dma->tx_chan) + dma_release_channel(dma->tx_chan); + + dma->rx_chan = NULL; + pr_warn("Failed to request RX DMA channel.\n"); + } + + return ret; +} + +static inline struct dma_chan * +sdhci_extdma_get_chan(struct sdhci_extdma *dma, struct mmc_data *data) +{ + return data->flags & MMC_DATA_WRITE ? dma->tx_chan : dma->rx_chan; +} + +static int sdhci_extdma_setup(struct sdhci_host *host, struct mmc_command *cmd) +{ + int ret = 0, i; + struct dma_async_tx_descriptor *desc; + struct mmc_data *data = cmd->data; + struct dma_chan *chan; + struct dma_slave_config cfg; + + if (!host->mapbase) + return -EINVAL; + + cfg.src_addr = host->mapbase + SDHCI_BUFFER; + cfg.dst_addr = host->mapbase + SDHCI_BUFFER; + cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + cfg.src_maxburst = data->blksz / 4; + cfg.dst_maxburst = data->blksz / 4; + + /* Sanity check: all the SG entries must be aligned by block size. */ + for (i = 0; i < data->sg_len; i++) { + if ((data->sg + i)->length % data->blksz) + return -EINVAL; + } + + chan = sdhci_extdma_get_chan(&host->extdma, data); + + ret = dmaengine_slave_config(chan, &cfg); + if (ret) + return ret; + + desc = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len, + mmc_get_dma_dir(data), + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!desc) + return -EINVAL; + + desc->callback = NULL; + desc->callback_param = NULL; + + dmaengine_submit(desc); + + return 0; +} + +static void sdhci_extdma_prepare_data(struct sdhci_host *host, + struct mmc_command *cmd) +{ + host->flags |= SDHCI_REQ_USE_DMA; + sdhci_prepare_data(host, cmd); + + if (sdhci_extdma_setup(host, cmd)) + dev_err(mmc_dev(host->mmc), "MMC start dma failure\n"); +} + +static void sdhci_extdma_pre_transfer(struct sdhci_host *host, + struct mmc_command *cmd) +{ + struct dma_chan *chan = sdhci_extdma_get_chan(&host->extdma, cmd->data); + + if (cmd->opcode != MMC_SET_BLOCK_COUNT) { + sdhci_set_timeout(host, cmd); + dma_async_issue_pending(chan); + } +} +#else +static int sdhci_extdma_init_chan(struct sdhci_host *host) +{ + return 0; +} + +static void sdhci_extdma_prepare_data(struct sdhci_host *host, + struct mmc_command *cmd) +{ + /* If SDHCI_EXTDMA not supported, PIO will be used */ + sdhci_prepare_data(host, cmd); +} + +static void sdhci_extdma_pre_transfer(struct sdhci_host *host, + struct mmc_command *cmd) +{} +#endif + +void sdhci_switch_extdma(struct sdhci_host *host, bool en) +{ + host->use_extdma = en; +} +EXPORT_SYMBOL_GPL(sdhci_switch_extdma); + void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) { int flags; @@ -1355,7 +1478,10 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) host->data_cmd = cmd; } - sdhci_prepare_data(host, cmd); + if (host->use_extdma) + sdhci_extdma_prepare_data(host, cmd); + else + sdhci_prepare_data(host, cmd); sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); @@ -1397,6 +1523,9 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) timeout += 10 * HZ; sdhci_mod_timer(host, cmd->mrq, timeout); + if (host->use_extdma) + sdhci_extdma_pre_transfer(host, cmd); + sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); } EXPORT_SYMBOL_GPL(sdhci_send_command); @@ -4133,6 +4262,12 @@ int sdhci_setup_host(struct sdhci_host *host) return ret; } + if (host->use_extdma) { + ret = sdhci_extdma_init_chan(host); + if (ret) + goto unreg; + } + return 0; unreg: diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index b001cf4..2d4a3ba 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -361,6 +361,12 @@ enum sdhci_cookie { COOKIE_MAPPED, /* mapped by sdhci_prepare_data() */ }; +struct sdhci_extdma { + struct sdhci_host *host; + struct dma_chan *rx_chan; + struct dma_chan *tx_chan; +}; + struct sdhci_host { /* Data set by hardware interface driver */ const char *hw_name; /* Hardware bus name */ @@ -475,6 +481,7 @@ struct sdhci_host { int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ + phys_addr_t mapbase; /* physical address base */ char *bounce_buffer; /* For packing SDMA reads/writes */ dma_addr_t bounce_addr; unsigned int bounce_buffer_size; @@ -524,6 +531,7 @@ struct sdhci_host { bool pending_reset; /* Cmd/data reset is pending */ bool irq_wake_enabled; /* IRQ wakeup is enabled */ bool v4_mode; /* Host Version 4 Enable */ + bool use_extdma; struct mmc_request *mrqs_done[SDHCI_MAX_MRQS]; /* Requests done */ struct mmc_command *cmd; /* Current command */ @@ -551,6 +559,9 @@ struct sdhci_host { struct timer_list timer; /* Timer for timeouts */ struct timer_list data_timer; /* Timer for data timeouts */ +#if IS_ENABLED(CONFIG_MMC_SDHCI_EXTDMA) + struct sdhci_extdma extdma; /* support external DMA */ +#endif u32 caps; /* CAPABILITY_0 */ u32 caps1; /* CAPABILITY_1 */ @@ -785,5 +796,6 @@ void sdhci_start_tuning(struct sdhci_host *host); void sdhci_end_tuning(struct sdhci_host *host); void sdhci_reset_tuning(struct sdhci_host *host); void sdhci_send_tuning(struct sdhci_host *host, u32 opcode); +void sdhci_switch_extdma(struct sdhci_host *host, bool en); #endif /* __SDHCI_HW_H */