From patchwork Tue Mar 7 02:46:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 660859 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 83BB3C6FD1E for ; Tue, 7 Mar 2023 02:46:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229932AbjCGCqz convert rfc822-to-8bit (ORCPT ); Mon, 6 Mar 2023 21:46:55 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49864 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229570AbjCGCqx (ORCPT ); Mon, 6 Mar 2023 21:46:53 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D0E165111; Mon, 6 Mar 2023 18:46:51 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id C160424E23C; Tue, 7 Mar 2023 10:46:48 +0800 (CST) Received: from EXMBX068.cuchost.com (172.16.6.68) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 7 Mar 2023 10:46:48 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX068.cuchost.com (172.16.6.68) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 7 Mar 2023 10:46:47 +0800 From: William Qiu To: , , CC: Rob Herring , Krzysztof Kozlowski , Jaehoon Chung , Ulf Hansson , William Qiu , Conor Dooley , Subject: [PATCH v5 1/2] dt-bindings: syscon: Add StarFive syscon doc Date: Tue, 7 Mar 2023 10:46:45 +0800 Message-ID: <20230307024646.10216-2-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230307024646.10216-1-william.qiu@starfivetech.com> References: <20230307024646.10216-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS066.cuchost.com (172.16.6.26) To EXMBX068.cuchost.com (172.16.6.68) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Add documentation to describe StarFive System Controller Registers. Signed-off-by: William Qiu Reviewed-by: Conor Dooley --- .../bindings/soc/starfive/jh7110-syscon.yaml | 41 +++++++++++++++++++ MAINTAINERS | 5 +++ 2 files changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml diff --git a/Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml b/Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml new file mode 100644 index 000000000000..72c8850602b5 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/starfive/jh7110-syscon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive JH7110 SoC system controller + +maintainers: + - William Qiu + +description: | + The StarFive JH7110 SoC system controller provides register information such + as offset, mask and shift to configure related modules such as MMC and PCIe. + +properties: + compatible: + items: + - enum: + - starfive,jh7110-aon-syscon + - starfive,jh7110-stg-syscon + - starfive,jh7110-sys-syscon + - const: syscon + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@10240000 { + compatible = "starfive,jh7110-stg-syscon", "syscon"; + reg = <0x10240000 0x1000>; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index 644ac9479a6e..fc9d1781516a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19665,6 +19665,11 @@ F: Documentation/devicetree/bindings/reset/starfive,jh7100-reset.yaml F: drivers/reset/starfive/reset-starfive-jh71* F: include/dt-bindings/reset/starfive?jh71*.h +STARFIVE JH7110 SYSCON +M: William Qiu +S: Supported +F: Documentation/devicetree/bindings/soc/starfive/jh7110-syscon.yaml + STATIC BRANCH/CALL M: Peter Zijlstra M: Josh Poimboeuf